Sfoglia per Autore
METHOD OF BLOCK-MATCHING MOTION ESTIMATION WITH FULL SEARCH IN A VIDEO SEQUENCE AND LOW COMPLEXITY/HIGH THROUGHPUT ARCHITECTURE
1999-01-01 Fanucci, Luca; Bertini, Lorenzo; Moio, Pierpaolo; Saponara, Sergio
High-throughput, low complexity, parametrizable VLSI architecture for full search block matching algorithm for advanced multimedia applications
1999-01-01 Fanucci, Luca; Saletti, Roberto; Bertini, L.; Moio, P.; Saponara, Sergio
METHOD OF BLOCK-MATCHING MOTION ESTIMATION WITH FULL SEARCH IN A VIDEO SEQUENCE AND CORRESPONDING ARCHITECTURE
2000-01-01 Fanucci, Luca; Bertini, Lorenzo; Moio, Pierpaolo; Saponara, Sergio
A VLSI architecture, particularly for motion estimation applications
2000-01-01 F., Rovati; D., Pau; Fanucci, Luca; Saponara, Sergio; A., Cenciotti; D., Alfonso
Method of block-matching motion estimation with full search in a video sequence and low complexity/high throughput architecture
2000-01-01 Fanucci, Luca; Bertini, Lorenzo; Moio, Pierpaolo; Saponara, Sergio
Programmable and low power VLSI architectures for full search motion estimation in multimedia communications
2000-01-01 Fanucci, Luca; Bertini, L; Saponara, Sergio; Moio, P.
IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications
2000-01-01 Fanucci, Luca; Saponara, Sergio; Cenciotti, A.
IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications
2000-01-01 Fanucci, Luca; Saponara, Sergio; Cenciotti, A.
Power optimization for H.263/MPEG-4 VLSI video coding
2001-01-01 A., Chimienti; Fanucci, Luca; R., Locatelli; Saponara, Sergio
Method of Block-Matching Motion Estimation with Full Search in a Video Sequence and Low Complexity / High Throughput Architecture
2001-01-01 Fanucci, Luca; Bertini, L; Moio, P; Saponara, Sergio
Rapid Prototyping for VLSI Image Processing Architectures
2001-01-01 Fanucci, Luca; R., Locatelli; Saponara, Sergio
Power Optimization for H.263/MPEG-4 VLSI Video Coding
2001-01-01 A., Chimienti; Fanucci, Luca; R., Locatelli; Saponara, Sergio
Power optimization for H.263/MPEG-4 VLSI video coding
2001-01-01 Chimienti, A; Fanucci, Luca; Locatelli, R; Saponara, Sergio
Exploring the VLSI Design Space for Low Power DCT/IDCT Macro Cells
2001-01-01 Fanucci, Luca; A., Barsanti; Saponara, Sergio
VLSI Architecture, in particular for motion estimation applications
2001-01-01 F., Rovati; D., Pau; Fanucci, Luca; Saponara, Sergio; A., Cenciotti; D., Alfonso
Rapid Prototyping for VLSI Image Processing Architectures
2001-01-01 Fanucci, Luca; Locatelli, R.; Saponara, Sergio
Parametrized and reusable VLSI macro cells for the low-power realization of 2-D discrete-cosine-transform
2001-01-01 Fanucci, Luca; Saletti, Roberto; Saponara, Sergio
A parametric VLSI architecture for video motion estimation
2001-01-01 Fanucci, Luca; Saponara, Sergio; Bertini, L.
VLSI Architecture, in Particular for Motion Estimation Applications
2002-01-01 Rovati, F; Pau, D; Fanucci, Luca; Saponara, Sergio; Cenciotti, A; Alfonso, D.
Data transfer and storage complexity analysis of the AVC/JVT Codec on a tool-by-tool basis
2002-01-01 Saponara, Sergio; Blanch, C; Denolf, K; Bormans, J.
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