Sfoglia per Autore
An automated S-box optimization based on composite field arithmetic
2017-01-01 Sarti, Luca; Baldanzi, Luca; Carnevale, Berardino; Fanucci, Luca
A Simulated Approach to Evaluate Side Channel Attack Countermeasures for the Advanced Encryption Standard
2018-01-01 Sarti, Luca; Baldanzi, Luca; Crocetti, Luca; Carnevale, Berardino; Fanucci, Luca
Procedimento di protezione da attacchi informatici al veicolo e corrispondente dispositivo
2018-01-01 Christian, Rosadini; Nesci, Walter; Baldanzi, Luca; Crocetti, Luca; Fanucci, Luca
Analysis of Cybersecurity Weakness in Automotive In-Vehicle Networking and Hardware Accelerators for Real-time Cryptography
2019-01-01 Baldanzi, Luca; Crocetti, Luca; Bertolucci, Matteo; Fanucci, Luca; Saponara, Sergio
Crypto accelerators for power-efficient and realtime on-chip implementation of secure algorithms
2019-01-01 Baldanzi, Luca; Crocetti, Luca; DI MATTEO, Stefano; Fanucci, Luca; Saponara, Sergio; Hameau, Patrice
A simulated approach to evaluate side-channel attack countermeasures for the Advanced Encryption Standard
2019-01-01 Crocetti, L.; Baldanzi, L.; Bertolucci, M.; Sarti, L.; Carnevale, B.; Fanucci, L.
Method and corresponding device for protecting vehicle from cyber attack
2019-01-01 Christian, Rozadini; Nesci, Walter; Baldanzi, Luca; Crocetti, Luca; Fanucci, Luca
Method for protecting a vehicle from network attacks and corresponding device
2019-01-01 Christian, Rosadini; Nesci, Walter; Baldanzi, Luca; Crocetti, Luca; Fanucci, Luca
Empowering Deafblind Communication Capabilities by Means of AI-Based Body Parts Tracking and Remotely Controlled Robotic Arm for Sign Language Speakers
2020-01-01 Panicacci, S.; Giuffrida, G.; Baldanzi, L.; Massari, L.; Terruso, G.; Zalteri, M.; Filosa, M.; Tonietti, G.; Oddo, C. M.; Fanucci, L.
Cryptographically secure pseudo-random number generator IP-core based on SHA2 algorithm
2020-01-01 Baldanzi, L.; Crocetti, L.; Francesco, F.; Bertolucci, M.; Belli, J.; Fanucci, L.; Saponara, S.
Digital Random Number Generator Hardware Accelerator IP-Core for Security Applications
2020-01-01 Baldanzi, L.; Crocetti, L.; Falaschi, F.; Belli, J.; Fanucci, L.; Saponara, S.
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative
2020-01-01 Nannipieri, P.; Bertolucci, M.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S.
VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative
2021-01-01 Nannipieri, P.; Matteo, S. D.; Baldanzi, L.; Crocetti, L.; Zulberti, L.; Saponara, S.; Fanucci, L.
Secure elliptic curve crypto-processor for real-time iot applications
2021-01-01 Di Matteo, S.; Baldanzi, L.; Crocetti, L.; Nannipieri, P.; Fanucci, L.; Saponara, S.
SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative
2021-01-01 Nannipieri, P.; Bertolucci, M.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S.
True random number generator based on Fibonacci-Galois ring oscillators for FPGA
2021-01-01 Nannipieri, P.; Di Matteo, S.; Baldanzi, L.; Crocetti, L.; Belli, J.; Fanucci, L.; Saponara, S.
VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative
2022-01-01 Nannipieri, P.; Matteo, S. D.; Baldanzi, L.; Crocetti, L.; Zulberti, L.; Saponara, S.; Fanucci, L.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| An automated S-box optimization based on composite field arithmetic | 1-gen-2017 | Sarti, Luca; Baldanzi, Luca; Carnevale, Berardino; Fanucci, Luca | |
| A Simulated Approach to Evaluate Side Channel Attack Countermeasures for the Advanced Encryption Standard | 1-gen-2018 | Sarti, Luca; Baldanzi, Luca; Crocetti, Luca; Carnevale, Berardino; Fanucci, Luca | |
| Procedimento di protezione da attacchi informatici al veicolo e corrispondente dispositivo | 1-gen-2018 | Christian, Rosadini; Nesci, Walter; Baldanzi, Luca; Crocetti, Luca; Fanucci, Luca | |
| Analysis of Cybersecurity Weakness in Automotive In-Vehicle Networking and Hardware Accelerators for Real-time Cryptography | 1-gen-2019 | Baldanzi, Luca; Crocetti, Luca; Bertolucci, Matteo; Fanucci, Luca; Saponara, Sergio | |
| Crypto accelerators for power-efficient and realtime on-chip implementation of secure algorithms | 1-gen-2019 | Baldanzi, Luca; Crocetti, Luca; DI MATTEO, Stefano; Fanucci, Luca; Saponara, Sergio; Hameau, Patrice | |
| A simulated approach to evaluate side-channel attack countermeasures for the Advanced Encryption Standard | 1-gen-2019 | Crocetti, L.; Baldanzi, L.; Bertolucci, M.; Sarti, L.; Carnevale, B.; Fanucci, L. | |
| Method and corresponding device for protecting vehicle from cyber attack | 1-gen-2019 | Christian, Rozadini; Nesci, Walter; Baldanzi, Luca; Crocetti, Luca; Fanucci, Luca | |
| Method for protecting a vehicle from network attacks and corresponding device | 1-gen-2019 | Christian, Rosadini; Nesci, Walter; Baldanzi, Luca; Crocetti, Luca; Fanucci, Luca | |
| Empowering Deafblind Communication Capabilities by Means of AI-Based Body Parts Tracking and Remotely Controlled Robotic Arm for Sign Language Speakers | 1-gen-2020 | Panicacci, S.; Giuffrida, G.; Baldanzi, L.; Massari, L.; Terruso, G.; Zalteri, M.; Filosa, M.; Tonietti, G.; Oddo, C. M.; Fanucci, L. | |
| Cryptographically secure pseudo-random number generator IP-core based on SHA2 algorithm | 1-gen-2020 | Baldanzi, L.; Crocetti, L.; Francesco, F.; Bertolucci, M.; Belli, J.; Fanucci, L.; Saponara, S. | |
| Digital Random Number Generator Hardware Accelerator IP-Core for Security Applications | 1-gen-2020 | Baldanzi, L.; Crocetti, L.; Falaschi, F.; Belli, J.; Fanucci, L.; Saponara, S. | |
| SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative | 1-gen-2020 | Nannipieri, P.; Bertolucci, M.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S. | |
| VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative | 1-gen-2021 | Nannipieri, P.; Matteo, S. D.; Baldanzi, L.; Crocetti, L.; Zulberti, L.; Saponara, S.; Fanucci, L. | |
| Secure elliptic curve crypto-processor for real-time iot applications | 1-gen-2021 | Di Matteo, S.; Baldanzi, L.; Crocetti, L.; Nannipieri, P.; Fanucci, L.; Saponara, S. | |
| SHA2 and SHA-3 accelerator design in a 7 nm technology within the European Processor Initiative | 1-gen-2021 | Nannipieri, P.; Bertolucci, M.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S. | |
| True random number generator based on Fibonacci-Galois ring oscillators for FPGA | 1-gen-2021 | Nannipieri, P.; Di Matteo, S.; Baldanzi, L.; Crocetti, L.; Belli, J.; Fanucci, L.; Saponara, S. | |
| VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative | 1-gen-2022 | Nannipieri, P.; Matteo, S. D.; Baldanzi, L.; Crocetti, L.; Zulberti, L.; Saponara, S.; Fanucci, L. |
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