Stuck-At-Fault Testability of SPP Three-Level Logic Forms

Recently introduced, three-level logic Sum of Pseudoproducts (SPP) forms al- low the representation of Boolean functions with much shorter expressions than standard two-level Sum of Products (SOP) forms, or other three-level logic forms. In this paper the testability of circuits derived from SPPs is analyzed. We study testability under the Stuck-At Fault Model (S AFM). For SPP networks several minimal forms can be considered. While full testability can be proved for some classes, others are shown to contain redundancies. Experimental results are given to demonstrate the efficiency of the approach.