A configurable Turbo-LDPC decoder comprising: - A set of P>1 Soft-Input-Soft-Output decoding units (DP0 - DPP-1; DPi) for iteratively decoding both Turbo- and LDPC-encoded input data, each of said decoding units having first (I1 i) and second (I2 i) input ports and first (O1 i) and second (O2 i) output ports for intermediate data; First and second memories (M1, M2) for storing said intermediate data, each of said first and second memories comprising P independently readable and writable memory blocks having respective input and output ports; and A configurable switching network (SN) for connecting the first input and output ports of said decoding units to the output and input ports of said first memory, and the second input and output ports of said decoding units to the output and input ports of said second memory.
FLEXIBLE CHANNEL DECODER
ROVINI, MASSIMO;FANUCCI, LUCA
2010-01-01
Abstract
A configurable Turbo-LDPC decoder comprising: - A set of P>1 Soft-Input-Soft-Output decoding units (DP0 - DPP-1; DPi) for iteratively decoding both Turbo- and LDPC-encoded input data, each of said decoding units having first (I1 i) and second (I2 i) input ports and first (O1 i) and second (O2 i) output ports for intermediate data; First and second memories (M1, M2) for storing said intermediate data, each of said first and second memories comprising P independently readable and writable memory blocks having respective input and output ports; and A configurable switching network (SN) for connecting the first input and output ports of said decoding units to the output and input ports of said first memory, and the second input and output ports of said decoding units to the output and input ports of said second memory.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.