A fully integrated RF front-end for 1.8 GHz wireless receiver is presented. The circuit is based on a single-conversion heterodyne architecture with a band-pass low noise amplifier and an image-reject mixer. Bootstrapped inductors are used to realize the high quality factor inductors of the tunable LC active filters in the variable gain low noise amplifier. The front-end, which has been designed for a 50 GHz bipolar process, presents an overall image-rejection greater than 62 dB at 100 MHz of intermediate frequency. The main characteristics of this design are a gain of 17.3 dB, a bandwidth of 45 MHz, a linearity range up to -20 dBm, a power consumption of 120 mW, a low area on die and a low cost, since no external components in the RF and IF signal paths are needed.
A Single-Chip 1.8 GHz Image Reject RF Receiver Front-end with Boot-Strapped Inductors
DI PASCOLI, STEFANO;FANUCCI, LUCA;NERI, BRUNO;
2002-01-01
Abstract
A fully integrated RF front-end for 1.8 GHz wireless receiver is presented. The circuit is based on a single-conversion heterodyne architecture with a band-pass low noise amplifier and an image-reject mixer. Bootstrapped inductors are used to realize the high quality factor inductors of the tunable LC active filters in the variable gain low noise amplifier. The front-end, which has been designed for a 50 GHz bipolar process, presents an overall image-rejection greater than 62 dB at 100 MHz of intermediate frequency. The main characteristics of this design are a gain of 17.3 dB, a bandwidth of 45 MHz, a linearity range up to -20 dBm, a power consumption of 120 mW, a low area on die and a low cost, since no external components in the RF and IF signal paths are needed.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
