Experiments in nuclear physics, biomedicine and astronomy often require pulse-counting electronics for large numbers of channels. This paper describes an event-counting system attached to 60 channels of an innovative monolithic array of SinglePhoton Avalanche Diodes (SPADA) intended for astronomical use. The system can capture events with pulse-counting rates of up to 20 MHz, a minimum integration time of 10 tts, which results in a data acquisition rate of 100 000 frames per second. It can also store several hours worth of data. This performance is achieved in a system that offers a high degree of flexibility, is small in size and has a low cost. The implementation is based on a Commercial-Off-The-Shelf (COTS) single board, fitted with an FPGA and a DSP. This board is connected to a PC by means of an IEEE 1394 high-speed serial link which stores the collected data and functions as a TCP/IP server. The data acquisition parameters, as well as the collected data, can be accessed by means of a custom-designed interface running on a TCP/IP client. A proof-of-concept system has been assembled and some test stand results are presented and discussed.
60-Channel 10 μs Time-Resolution Counter Array for Long Term Continuous Event Counting
BARONTI, FEDERICO;RONCELLA, ROBERTO;SALETTI, ROBERTO;
2007-01-01
Abstract
Experiments in nuclear physics, biomedicine and astronomy often require pulse-counting electronics for large numbers of channels. This paper describes an event-counting system attached to 60 channels of an innovative monolithic array of SinglePhoton Avalanche Diodes (SPADA) intended for astronomical use. The system can capture events with pulse-counting rates of up to 20 MHz, a minimum integration time of 10 tts, which results in a data acquisition rate of 100 000 frames per second. It can also store several hours worth of data. This performance is achieved in a system that offers a high degree of flexibility, is small in size and has a low cost. The implementation is based on a Commercial-Off-The-Shelf (COTS) single board, fitted with an FPGA and a DSP. This board is connected to a PC by means of an IEEE 1394 high-speed serial link which stores the collected data and functions as a TCP/IP server. The data acquisition parameters, as well as the collected data, can be accessed by means of a custom-designed interface running on a TCP/IP client. A proof-of-concept system has been assembled and some test stand results are presented and discussed.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.