In this paper we describe a methodology to set up a behavioral verification for complex mixed-signal System-on-Chip (SoC). The verification flow, consisting in VHDL-AMS modeling of the analog and mixed-signal section of a generic system, is depicted. This methodology has been successfully adopted for the top level debugging of a mixed signal SoC for sensor interface.

Mixed Signal Behavioral Verification using VHDL-AMS

FANUCCI, LUCA
2005-01-01

Abstract

In this paper we describe a methodology to set up a behavioral verification for complex mixed-signal System-on-Chip (SoC). The verification flow, consisting in VHDL-AMS modeling of the analog and mixed-signal section of a generic system, is depicted. This methodology has been successfully adopted for the top level debugging of a mixed signal SoC for sensor interface.
2005
9780780393455
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/98925
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