The increasing complexity, in terms of both physical dimension and performance demand, of current Systems on Chip (SoCs) led to the development of new suitable interconnect architecture, leveraging on computer network technology, called Network on Chip (NoC). This paper describes two architectures of advanced physical link for NoC, the former based on mesochronous technology, the latter based on asynchronous.

Skew Insensitive Physical Links for Network on Chip

FANUCCI, LUCA;
2006-01-01

Abstract

The increasing complexity, in terms of both physical dimension and performance demand, of current Systems on Chip (SoCs) led to the development of new suitable interconnect architecture, leveraging on computer network technology, called Network on Chip (NoC). This paper describes two architectures of advanced physical link for NoC, the former based on mesochronous technology, the latter based on asynchronous.
2006
9781424403912
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/106444
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