A logic theory pattern for linearized control systems

This paper describes a procedure that system developers can follow to translate typical mathematical representations of linearized control systems into logic theories. These theories are then used to verify system requirements and find constraints on design parameters, with the support of computer-assisted theorem proving. This method contributes to the integration of formal verification methods into the standard model-driven development processes for control systems. The theories obtained through its application comprise a set of assumptions that the system equations must satisfy, and a translation of the equations into the logic language of the Prototype Verification System theorem-proving environment. The method is illustrated with a standard case study from control theory.