A CMOS interface for three-axis capacitive accelerometers is presented. The circuit implements an innovative readout approach which allows to obtain a power consumption much lower than traditional schemes, thanks also to the reduced circuit complexity. A total power consumption of 175 muW at the nominal supply voltage 2.5 V is obtained for the entire interface.
A low power CMOS interface circuit for three-axis integrated accelerometers
BRUSCHI, PAOLO;
2007-01-01
Abstract
A CMOS interface for three-axis capacitive accelerometers is presented. The circuit implements an innovative readout approach which allows to obtain a power consumption much lower than traditional schemes, thanks also to the reduced circuit complexity. A total power consumption of 175 muW at the nominal supply voltage 2.5 V is obtained for the entire interface.File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
