A CMOS interface for three-axis capacitive accelerometers is presented. The circuit implements an innovative readout approach which allows to obtain a power consumption much lower than traditional schemes, thanks also to the reduced circuit complexity. A total power consumption of 175 muW at the nominal supply voltage 2.5 V is obtained for the entire interface.

A low power CMOS interface circuit for three-axis integrated accelerometers

BRUSCHI, PAOLO;
2007-01-01

Abstract

A CMOS interface for three-axis capacitive accelerometers is presented. The circuit implements an innovative readout approach which allows to obtain a power consumption much lower than traditional schemes, thanks also to the reduced circuit complexity. A total power consumption of 175 muW at the nominal supply voltage 2.5 V is obtained for the entire interface.
9781424410002
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/114620
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