This paper presents an application of the ISIF chip (Intelligent Sensor InterFace), for conditioning a dualaxis low-g accelerometer in MEMS technology. MEMS are nowadays the standard in automotive applications (and not only), as they feature a drastic reduction in cost, area and power, while they require a more complex electronic interface with respect to traditional discrete devices. ISIF is a Platform On Chip implementation, aiming to fast prototype a wide range of automotive sensors thanks to its high configuration resources, achieved both by full analog / digital IPs trimming options and by flexible routing structures. This accelerometer implementation exploits a relevant part of ISIF hardware resources, but also requires signal processing add-ins (software emulation of digital DSP blocks) for the closed loop conditioning architecture and for performance improvement (for example temperature drift compensation). In spite the short prototyping time, the resulting system achieves good performances with respect to commercial devices, featuring a 0.9 mgn/√z noise density with 1024 LSB/g sensitivity on the digital output over a +/- 2g FS, and an offset drift over 100°C range within 30 mg, with 2% of FS sensitivity drift. Miniboards have been developed as product prototypes, consisting of a small PCB with ISIF and accelerometer dies bonded together, firmware embedded in EEPROM and communication transceivers.

Low-g Accelerometer Fast Prototyping for Automotive Applications

FANUCCI, LUCA;
2007

Abstract

This paper presents an application of the ISIF chip (Intelligent Sensor InterFace), for conditioning a dualaxis low-g accelerometer in MEMS technology. MEMS are nowadays the standard in automotive applications (and not only), as they feature a drastic reduction in cost, area and power, while they require a more complex electronic interface with respect to traditional discrete devices. ISIF is a Platform On Chip implementation, aiming to fast prototype a wide range of automotive sensors thanks to its high configuration resources, achieved both by full analog / digital IPs trimming options and by flexible routing structures. This accelerometer implementation exploits a relevant part of ISIF hardware resources, but also requires signal processing add-ins (software emulation of digital DSP blocks) for the closed loop conditioning architecture and for performance improvement (for example temperature drift compensation). In spite the short prototyping time, the resulting system achieves good performances with respect to commercial devices, featuring a 0.9 mgn/√z noise density with 1024 LSB/g sensitivity on the digital output over a +/- 2g FS, and an offset drift over 100°C range within 30 mg, with 2% of FS sensitivity drift. Miniboards have been developed as product prototypes, consisting of a small PCB with ISIF and accelerometer dies bonded together, firmware embedded in EEPROM and communication transceivers.
9783981080124
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11568/114910
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