One of the key-points in System on Chip (SoC) design is to have the proper clock oscillator. Currently the most used are RC and quartz oscillators. They feature different characteristics in terms of performance, power consumption and cost, both oscillators have their own advantages and drawbacks. Sometimes SoC design would benefit to have both solutions in order to best cope with all requirements. This calls for an integrated architecture to dynamically switch between the two clock signals. In this paper we present a new parametric architecture able to handle a generic number of clock signals allowing the dynamic switch from one clock to the other. The detailed structure is here shown and an accurate timing analysis is also presented to prove its robustness and the absence of glitch on output clock signal. FPGA and 0.35 μm CMOS implementations are presented for an automotive SoC design.
A Dynamic Clock Switch for Automotive System on Chip
FANUCCI, LUCA;
2007-01-01
Abstract
One of the key-points in System on Chip (SoC) design is to have the proper clock oscillator. Currently the most used are RC and quartz oscillators. They feature different characteristics in terms of performance, power consumption and cost, both oscillators have their own advantages and drawbacks. Sometimes SoC design would benefit to have both solutions in order to best cope with all requirements. This calls for an integrated architecture to dynamically switch between the two clock signals. In this paper we present a new parametric architecture able to handle a generic number of clock signals allowing the dynamic switch from one clock to the other. The detailed structure is here shown and an accurate timing analysis is also presented to prove its robustness and the absence of glitch on output clock signal. FPGA and 0.35 μm CMOS implementations are presented for an automotive SoC design.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
