Partial Reconfiguration Feature in Crypto Algorithm for Cloud Application

The implementation of crypto algorithm in general-purpose computing platforms involves security protocols, secured storage, digital certificates, secure execution, digital right management, etc. The present researchers undertook systematic design explorations to implement various crypto issues in hardware in concurrence with the generation changes taking place in FPGA technology including the latest dynamic reconfigurable embedded platform. The partial reconfigurable hardware platform is an advanced and latest version in the growth path of FPGA technology and implementation of various crypto issues in such a system is an important area of today’s research interest. The performance of a software crypto implementation in processors usually takes extensive execution time, while the same implemented in hardware takes much lesser time as well as performs in much cost-effective manner in respect of resource usage and power. Hence, a new approach has to be adopted to design such systems based on metrics involving resource usage, throughput, and power along with adequate security. This new solution to security leads to an issue of optimization of crypto processors which can balance both the hardware and security issues of modern crypto systems. This paper explores three generations of crypto solutions. The upgradation issue of the generation of crypto solutions comes from the changing trend of FPGA technology as well as the crypto systems. The first-generation crypto system operated in processors has less efficiency and is more vulnerable to security, whereas the second generation operated in embedded hardware comes with more security, poor flexibility, and higher design complexity. The third generation using PR platform provides an optimum balance between first- and second-generation crypto solutions leading to high flexibility time and high efficiency. In this paper, we implement third-generation crypto hardware in a fog system which is placed between IoT device and cloud. The adoption of fog in existing architecture reduces the processing cost of the cloud. ISE14.4 suite with ZYNQ7z020-clg484 FPGA platform is used to implement third-generation crypto core.