In 1980, Victor Miller and Neal Koblitz proposed Elliptic Curve Cryptography (ECC) that is popularly known as asymmetric key crypto algorithm which is rooted in the ECDLP on finite fields known as Elliptic Curve Discrete Logarithm Problem. The main advantage of ECC, over the other public key cryptography (like RSA), is that it gives equivalent security performance level but using the smaller key size length. In this paper, we proposed an ECC hardware implementation based on FPGA. Also, hardware implementation of Elliptic Curve Digital Signature Algorithm (ECDSA) in FPGA and its comparison with other implementation is presented. The ECC hardware implementations are categorized into two main implementing technologies, and they are FPGA and ASIC implementations. We first discuss elliptic curves standards, point multiplication over binary fields GF, and the use of prime fields on the hardware implementation. The proposed method evaluates the performance analysis of ECC implementation in an FPGA.

Binary Field Point Multiplication Implementation in FPGA Hardware

Paul Rourab;
2021-01-01

Abstract

In 1980, Victor Miller and Neal Koblitz proposed Elliptic Curve Cryptography (ECC) that is popularly known as asymmetric key crypto algorithm which is rooted in the ECDLP on finite fields known as Elliptic Curve Discrete Logarithm Problem. The main advantage of ECC, over the other public key cryptography (like RSA), is that it gives equivalent security performance level but using the smaller key size length. In this paper, we proposed an ECC hardware implementation based on FPGA. Also, hardware implementation of Elliptic Curve Digital Signature Algorithm (ECDSA) in FPGA and its comparison with other implementation is presented. The ECC hardware implementations are categorized into two main implementing technologies, and they are FPGA and ASIC implementations. We first discuss elliptic curves standards, point multiplication over binary fields GF, and the use of prime fields on the hardware implementation. The proposed method evaluates the performance analysis of ECC implementation in an FPGA.
2021
9789811559709
9789811559716
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/1219416
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