An analog, Gilbert-like CMOS multiplier, based on a novel linear current divider, is described. The divider uses a cascade of two differential pairs to produce a linear dependence between the tail current and the two output currents. A numerical algorithm has been implemented to find the optimum sizing of the active devices in order to compensate for the deviation from the ideal MOSFET square law. The results of low frequency measurements performed on a prototype, designed with CMOS devices from the STMicroelectronic process BCD6s, are shown.

A Four Quadrant Analog Multiplier Based on a Novel CMOS Linear Current Divider

DEI M;BRUSCHI, PAOLO;PIOTTO, MASSIMO
2009-01-01

Abstract

An analog, Gilbert-like CMOS multiplier, based on a novel linear current divider, is described. The divider uses a cascade of two differential pairs to produce a linear dependence between the tail current and the two output currents. A numerical algorithm has been implemented to find the optimum sizing of the active devices in order to compensate for the deviation from the ideal MOSFET square law. The results of low frequency measurements performed on a prototype, designed with CMOS devices from the STMicroelectronic process BCD6s, are shown.
2009
9781424437320
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/133322
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