Low-Power Techniques for Flexible Channel Decoders

This paper proposes a framework for a low-power design of flexible multi-standard channel decoders which are the most computational demanding blocks of modern communication systems. A power-efficient design envisages hardware level techniques to reduce static power consumption and algorithmic level technique to early stop the iterative decoding when the received information is estimated to be correct. Particularly, the paper focuses on two different stopping rules for Turbo codes which are well-suited for a multi-standard scenario. Simulation results indeed show an achievable power saving ranging from 50% to 80%.