In logic synthesis, the “regularity” of a Boolean function can be exploited with the purpose of decreasing the cost of the corresponding algebraic expression or its minimization time. In this paper we study the synthesis of a class of regular Boolean functions called D-reducible. We propose two compact and testable representations of D-reducible non completely specified functions, called DRedSOP and 2DRedSOP. The experimental results show that a large percentage (about 70%) of the benchmark functions have at least a D-reducible output. The gain in area of the synthesized networks for such functions is, on average, 27% for DRedSOPs and 28% for 2DRedSOPs.
Logic Synthesis and Testability of D-Reducible Functions
BERNASCONI, ANNA;
2010-01-01
Abstract
In logic synthesis, the “regularity” of a Boolean function can be exploited with the purpose of decreasing the cost of the corresponding algebraic expression or its minimization time. In this paper we study the synthesis of a class of regular Boolean functions called D-reducible. We propose two compact and testable representations of D-reducible non completely specified functions, called DRedSOP and 2DRedSOP. The experimental results show that a large percentage (about 70%) of the benchmark functions have at least a D-reducible output. The gain in area of the synthesized networks for such functions is, on average, 27% for DRedSOPs and 28% for 2DRedSOPs.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
