Evaluation of On-Chip Multiprocessor Architectures for an Embedded Cartographic System

Embedded systems with complex graphical interfaces require significant computational power. Moreover, low power consumption and low cost are usually strict specification constraints. A possible solution for addressing these conflicting needs is the adoption of a simple multiprocessor on a single chip, using low-cost CPU cores. In this paper, we consider a cartographic system to be deployed on hand-held devices, and we present the methodology used for designing the multiprocessor architecture for its hardware platform. Whenever large chip productions are involved, the multiprocessor can be specialized to meet the software requirements of embedded applications. The proposed design process is based on the following steps: Workload definition; Definition of a pool of eligible architectures; Simulation of the software workload; Comparison and analysis of simulation results. In this scenario, trace- driven simulations are aimed at evaluating performance of time-critical paths of typical user activities. The results are used for a proper architecture tuning, determining several architecture parameters (such as the number of CPU cores, the number and width of internal buses, the cache parameters, etc.). The outcome of the design process for the specific system considered in this paper is an architecture with ARM cores, able to support cartographic applications at low cost and low power consumption.