In this paper the co-verification and co-simulation questions of hardware-software video processing architectures are addressed. The proposed solution is a rapid prototyping methodology based on a bread boarding approach: a host processor runs the software tasks while dedicated hardware coprocessors are implemented on FPGA technology. Video I/O interfaces allow real time user interaction. An exhaustive subjective and objective analysis can be performed at both algorithmic and architectural levels considerably reducing the time spent with respect to conventional software simulation approach. A low bit rate video coder is presented as interesting case of study to demonstrate the effectiveness of our proposal.
Rapid Prototyping for VLSI Image Processing Architectures
FANUCCI, LUCA;SAPONARA, SERGIO
2001-01-01
Abstract
In this paper the co-verification and co-simulation questions of hardware-software video processing architectures are addressed. The proposed solution is a rapid prototyping methodology based on a bread boarding approach: a host processor runs the software tasks while dedicated hardware coprocessors are implemented on FPGA technology. Video I/O interfaces allow real time user interaction. An exhaustive subjective and objective analysis can be performed at both algorithmic and architectural levels considerably reducing the time spent with respect to conventional software simulation approach. A low bit rate video coder is presented as interesting case of study to demonstrate the effectiveness of our proposal.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
