We propose a new generation of VLSI processors for pattern recognition, based on associative memory architecture, optimized for online track finding in high-energy physics experiments. We describe the architecture, the technology studies and the prototype design of a new associative memory project: it maximizes the pattern density on the ASIC, minimizes the power consumption and improves the functionality for the fast tracker processor proposed to upgrade the ATLAS trigger at LHC.
Titolo: | Associative memory design for the fast track processor (FTK) at ATLAS2011 IEEE Nuclear Science Symposium Conference Record |
Autori interni: | |
Anno del prodotto: | 2011 |
Rivista: | |
Abstract: | We propose a new generation of VLSI processors for pattern recognition, based on associative memory architecture, optimized for online track finding in high-energy physics experiments. We describe the architecture, the technology studies and the prototype design of a new associative memory project: it maximizes the pattern density on the ASIC, minimizes the power consumption and improves the functionality for the fast tracker processor proposed to upgrade the ATLAS trigger at LHC. |
Handle: | http://hdl.handle.net/11568/538950 |
ISBN: | 9781467301183 9781467301190 9781467301206 |
Appare nelle tipologie: | 4.1 Contributo in Atti di convegno |
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