This work presents the characterization results of the first prototype of a readout channel for silicon pixel detectors, developed by the PixFEL collaboration in view of future X-ray Free Electron Laser (FEL) applications. The circuit, fabricated in a 65 nm CMOS technology by TSMC, has been designed to deal with a maximum input signal of 104 photons with energy from 1 keV to 10 keV, by exploiting a non-linear technique implemented at front-end level. Moreover, it has been envisioned for operation with the demanding frame rates of next generation FEL facilities, which can reach a few MHz. This paper presents results from measurements performed on the building blocks of the readout processor, along with a summary of the overall performance of the complete readout channel.

A 10 bit resolution readout channel with dynamic range compression for X-ray imaging at FELs

BATIGNANI, GIOVANNI;BETTARINI, STEFANO;CASAROSA, GIULIA;FORTI, FRANCESCO;MORSANI, FABIO;PALADINO, ANTONIO;PAOLONI, EUGENIO;RIZZO, GIULIANA;
2015-01-01

Abstract

This work presents the characterization results of the first prototype of a readout channel for silicon pixel detectors, developed by the PixFEL collaboration in view of future X-ray Free Electron Laser (FEL) applications. The circuit, fabricated in a 65 nm CMOS technology by TSMC, has been designed to deal with a maximum input signal of 104 photons with energy from 1 keV to 10 keV, by exploiting a non-linear technique implemented at front-end level. Moreover, it has been envisioned for operation with the demanding frame rates of next generation FEL facilities, which can reach a few MHz. This paper presents results from measurements performed on the building blocks of the readout processor, along with a summary of the overall performance of the complete readout channel.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/838128
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