STRANGIO, SEBASTIANO Statistiche
STRANGIO, SEBASTIANO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE
A 2-D-Material FET Verilog-A Model for Analog Neuromorphic Circuit Design
2023-01-01 Dubey, P. K.; Strangio, S.; Marin, E. G.; Iannaccone, G.; Fiori, G.
Load Modulation Feedback in Adaptive Matching Networks for Low-Coupling Wireless Power Transfer Systems
2023-01-01 Bertozzi, M.; Catania, A.; Bandini, G.; Strangio, S.; Iannaccone, G.
A 0.6V–1.8V Compact Temperature Sensor with 0.24 °C Resolution, ±1.4 °C Inaccuracy and 1.06 nJ per Conversion
2022-01-01 Zambrano, B.; Garzon, E.; Strangio, S.; Iannaccone, G.; Lanuzza, M.
A 6.78 MHz Maximum Efficiency Tracking Active Rectifier with Load Modulation Control for Wireless Power Transfer to Implantable Medical Devices
2022-01-01 Rizzo, Tommaso; Catania, Alessandro; Bertolacci, Gabriele; Strangio, Sebastiano; Iannaccone, Giuseppe
All-Analog Silicon Integration of Image Sensor and Neural Computing Engine for Image Classification
2022-01-01 Zambrano, B.; Strangio, S.; Rizzo, T.; Garzon, E.; Lanuzza, M.; Iannaccone, G.
Design of Ultra-Low Voltage/Power Circuits and Systems
2022-01-01 Lanuzza, M.; De Rose, R.; Strangio, S.
Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2
2022-01-01 Migliato Marega, G.; Wang, Z.; Paliy, M.; Giusi, G.; Strangio, S.; Castiglione, F.; Callegari, C.; Tripathi, M.; Radenovic, A.; Iannaccone, G.; Kis, A.
Time Domain Analog Neuromorphic Engine Based on High-Density Non-Volatile Memory in Single-Poly CMOS
2022-01-01 Rizzo, Tommaso; Strangio, Sebastiano; Iannaccone, Giuseppe
A 0.05 mm2, 350 mV, 14 nW fully-integrated temperature sensor in 180-nm CMOS
2021-01-01 Zambrano, B.; Garzon, E.; Strangio, S.; Crupi, F.; Lanuzza, M.
A Low-Voltage, Low-Power Reconfigurable Current-Mode Softmax Circuit for Analog Neural Networks
2021-01-01 Vatalaro, M.; Moposita, T.; Strangio, S.; Trojman, L.; Vladimirescu, A.; Lanuzza, M.; Crupi, F.
Assessment of Two-Dimensional Materials-based technology for Analog Neural Networks
2021-01-01 Paliy, Maksym; Strangio, Sebastiano; Ruiu, Piero; Iannaccone, Giuseppe
Power electronics based on wide-bandgap semiconductors: opportunities and challenges
2021-01-01 Iannaccone, Giuseppe; Sbrana, Christian; Morelli, Iacopo; Strangio, Sebastiano
Single-poly floating-gate memory cell options for analog neural networks
2021-01-01 Paliy, M.; Rizzo, T.; Ruiu, P.; Strangio, S.; Iannaccone, G.
Ultralow voltage finFET-versus TFET-based STT-MRAM cells for iot applications
2021-01-01 Garzon, E.; Lanuzza, M.; Taco, R.; Strangio, S.
Analog Vector-Matrix Multiplier Based on Programmable Current Mirrors for Neural Network Integrated Circuits
2020-01-01 Paliy, Maksym; Strangio, Sebastiano; Ruiu, Piero; Rizzo, Tommaso; Iannaccone, Giuseppe
Observation of single phonon-mediated quantum transport in a silicon single-electron CMOS single-atom transistor by RMS noise analysis
2020-01-01 Bigoni, S.; Tagliaferri, M. L. V.; Tamascelli, D.; Strangio, S.; Bez, R.; Organtini, P.; Ferrari, G.; Prati, E.
Pixel Design Driven Performance Improvement in 4T CMOS Image Sensors: Dark Current Reduction and Full-Well Enhancement
2020-01-01 Brunetti, Alessandro Michel; Musolino, Mattia; Strangio, Sebastiano; Choubey, Bhaskar
Digital and analog TFET circuits: Design and benchmark
2018-01-01 Strangio, S.; Settino, F.; Palestri, P.; Lanuzza, M.; Crupi, F.; Esseni, D.; Selmi, L.
Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs
2018-01-01 Settino, F.; Strangio, S.; Lanuzza, M.; Crupi, F.; Palestri, P.; Esseni, D.
Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations
2018-01-01 Luong, G. V.; Strangio, S.; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, P.; Mantl, S.; Zhao, Q. T.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| A 2-D-Material FET Verilog-A Model for Analog Neuromorphic Circuit Design | 1-gen-2023 | Dubey, P. K.; Strangio, S.; Marin, E. G.; Iannaccone, G.; Fiori, G. | |
| Load Modulation Feedback in Adaptive Matching Networks for Low-Coupling Wireless Power Transfer Systems | 1-gen-2023 | Bertozzi, M.; Catania, A.; Bandini, G.; Strangio, S.; Iannaccone, G. | |
| A 0.6V–1.8V Compact Temperature Sensor with 0.24 °C Resolution, ±1.4 °C Inaccuracy and 1.06 nJ per Conversion | 1-gen-2022 | Zambrano, B.; Garzon, E.; Strangio, S.; Iannaccone, G.; Lanuzza, M. | |
| A 6.78 MHz Maximum Efficiency Tracking Active Rectifier with Load Modulation Control for Wireless Power Transfer to Implantable Medical Devices | 1-gen-2022 | Rizzo, Tommaso; Catania, Alessandro; Bertolacci, Gabriele; Strangio, Sebastiano; Iannaccone, Giuseppe | |
| All-Analog Silicon Integration of Image Sensor and Neural Computing Engine for Image Classification | 1-gen-2022 | Zambrano, B.; Strangio, S.; Rizzo, T.; Garzon, E.; Lanuzza, M.; Iannaccone, G. | |
| Design of Ultra-Low Voltage/Power Circuits and Systems | 1-gen-2022 | Lanuzza, M.; De Rose, R.; Strangio, S. | |
| Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2 | 1-gen-2022 | Migliato Marega, G.; Wang, Z.; Paliy, M.; Giusi, G.; Strangio, S.; Castiglione, F.; Callegari, C.; Tripathi, M.; Radenovic, A.; Iannaccone, G.; Kis, A. | |
| Time Domain Analog Neuromorphic Engine Based on High-Density Non-Volatile Memory in Single-Poly CMOS | 1-gen-2022 | Rizzo, Tommaso; Strangio, Sebastiano; Iannaccone, Giuseppe | |
| A 0.05 mm2, 350 mV, 14 nW fully-integrated temperature sensor in 180-nm CMOS | 1-gen-2021 | Zambrano, B.; Garzon, E.; Strangio, S.; Crupi, F.; Lanuzza, M. | |
| A Low-Voltage, Low-Power Reconfigurable Current-Mode Softmax Circuit for Analog Neural Networks | 1-gen-2021 | Vatalaro, M.; Moposita, T.; Strangio, S.; Trojman, L.; Vladimirescu, A.; Lanuzza, M.; Crupi, F. | |
| Assessment of Two-Dimensional Materials-based technology for Analog Neural Networks | 1-gen-2021 | Paliy, Maksym; Strangio, Sebastiano; Ruiu, Piero; Iannaccone, Giuseppe | |
| Power electronics based on wide-bandgap semiconductors: opportunities and challenges | 1-gen-2021 | Iannaccone, Giuseppe; Sbrana, Christian; Morelli, Iacopo; Strangio, Sebastiano | |
| Single-poly floating-gate memory cell options for analog neural networks | 1-gen-2021 | Paliy, M.; Rizzo, T.; Ruiu, P.; Strangio, S.; Iannaccone, G. | |
| Ultralow voltage finFET-versus TFET-based STT-MRAM cells for iot applications | 1-gen-2021 | Garzon, E.; Lanuzza, M.; Taco, R.; Strangio, S. | |
| Analog Vector-Matrix Multiplier Based on Programmable Current Mirrors for Neural Network Integrated Circuits | 1-gen-2020 | Paliy, Maksym; Strangio, Sebastiano; Ruiu, Piero; Rizzo, Tommaso; Iannaccone, Giuseppe | |
| Observation of single phonon-mediated quantum transport in a silicon single-electron CMOS single-atom transistor by RMS noise analysis | 1-gen-2020 | Bigoni, S.; Tagliaferri, M. L. V.; Tamascelli, D.; Strangio, S.; Bez, R.; Organtini, P.; Ferrari, G.; Prati, E. | |
| Pixel Design Driven Performance Improvement in 4T CMOS Image Sensors: Dark Current Reduction and Full-Well Enhancement | 1-gen-2020 | Brunetti, Alessandro Michel; Musolino, Mattia; Strangio, Sebastiano; Choubey, Bhaskar | |
| Digital and analog TFET circuits: Design and benchmark | 1-gen-2018 | Strangio, S.; Settino, F.; Palestri, P.; Lanuzza, M.; Crupi, F.; Esseni, D.; Selmi, L. | |
| Simulations and comparisons of basic analog and digital circuit blocks employing Tunnel FETs and conventional FinFETs | 1-gen-2018 | Settino, F.; Strangio, S.; Lanuzza, M.; Crupi, F.; Palestri, P.; Esseni, D. | |
| Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations | 1-gen-2018 | Luong, G. V.; Strangio, S.; Tiedemann, A. T.; Bernardy, P.; Trellenkamp, S.; Palestri, P.; Mantl, S.; Zhao, Q. T. |