STRANGIO, SEBASTIANO Statistiche
STRANGIO, SEBASTIANO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE
12-bit Delta-Sigma ADC Operating at a Temperature of Up to 250 °C in Standard 0.18 μm SOI CMOS
2025-01-01 Sbrana, Christian; Catania, Alessandro; Toschi, Tommaso; Strangio, Sebastiano; Iannaccone, Giuseppe
A Physical Unclonable Function Based on a Differential Subthreshold PMOS Array with 9.73 × 10−4 Stabilized BER and 1.3 pJ/bit in 65 nm
2025-01-01 Zambrano, Benjamin; Strangio, Sebastiano; Garzón, Esteban; Catania, Alessandro; Iannaccone, Giuseppe; Lanuzza, Marco
High-Entropy Analog-Based Strong Physical Unclonable Function With Area-to-Entropy-Ratio of 166 F2/bit
2025-01-01 Catania, Alessandro; Strangio, Sebastiano; Paliy, Maksym; Sbrana, Christian; Bertozzi, Michele; Iannaccone, Giuseppe
High-Entropy Analog-Based Strong PUF Reaching 166 F2/Bit Area-to-Entropy-Ratio
2025-01-01 Catania, Alessandro; Strangio, Sebastiano; Paliy, Maksym; Sbrana, Christian; Bertozzi, Michele; Iannaccone, Giuseppe
Temperature-Resilient Analog Neuromorphic Chip in Single-Polysilicon CMOS Technology
2025-01-01 Rizzo, Tommaso; Strangio, Sebastiano; Catania, Alessandro; Iannaccone, Giuseppe
Data Loggers for High-Temperature Industrial Environments
2024-01-01 Cecchi, Roberto; Catania, Alessandro; Sbrana, Christian; Macucci, Massimo; Strangio, Sebastiano; Iannaccone, Giuseppe
Design Criteria of High-Temperature Integrated Circuits Using Standard SOI CMOS Process up to 300°C
2024-01-01 Sbrana, Christian; Catania, Alessandro; Paliy, Maksym; Pascoli, Stefano Di; Strangio, Sebastiano; Macucci, Massimo; Iannaccone, Giuseppe
High-Temperature 13-Bit Delta-Sigma ADC in Standard SOI CMOS Operating Up to 260°C
2024-01-01 Sbrana, C.; Catania, A.; Toschi, T.; Strangio, S.; Iannaccone, G.
A 2-D-Material FET Verilog-A Model for Analog Neuromorphic Circuit Design
2023-01-01 Dubey, P. K.; Strangio, S.; Marin, E. G.; Iannaccone, G.; Fiori, G.
Electromagnetic Design of an Inductive Wireless Power Transfer System for Endoscopic Capsule
2023-01-01 Bandini, Gabriele; Buffi, Alice; Marracci, Mirko; Tellini, Bernardo; Rizzo, Tommaso; Macucci, Massimo; Strangio, Sebastiano; Iannaccone, Giuseppe
Load Modulation Feedback in Adaptive Matching Networks for Low-Coupling Wireless Power Transfer Systems
2023-01-01 Bertozzi, M.; Catania, A.; Bandini, G.; Strangio, S.; Iannaccone, G.
The case for hybrid analog neuromorphic chips based on silicon and 2D materials
2023-01-01 Iannaccone, G.; Rizzo, T.; Paliy, M.; Strangio, S.
A 0.6V–1.8V Compact Temperature Sensor with 0.24 °C Resolution, ±1.4 °C Inaccuracy and 1.06 nJ per Conversion
2022-01-01 Zambrano, B.; Garzon, E.; Strangio, S.; Iannaccone, G.; Lanuzza, M.
A 6.78 MHz Maximum Efficiency Tracking Active Rectifier with Load Modulation Control for Wireless Power Transfer to Implantable Medical Devices
2022-01-01 Rizzo, Tommaso; Catania, Alessandro; Bertolacci, Gabriele; Strangio, Sebastiano; Iannaccone, Giuseppe
All-Analog Silicon Integration of Image Sensor and Neural Computing Engine for Image Classification
2022-01-01 Zambrano, B.; Strangio, S.; Rizzo, T.; Garzon, E.; Lanuzza, M.; Iannaccone, G.
Design of Ultra-Low Voltage/Power Circuits and Systems
2022-01-01 Lanuzza, M.; De Rose, R.; Strangio, S.
Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2
2022-01-01 Migliato Marega, G.; Wang, Z.; Paliy, M.; Giusi, G.; Strangio, S.; Castiglione, F.; Callegari, C.; Tripathi, M.; Radenovic, A.; Iannaccone, G.; Kis, A.
Time Domain Analog Neuromorphic Engine Based on High-Density Non-Volatile Memory in Single-Poly CMOS
2022-01-01 Rizzo, Tommaso; Strangio, Sebastiano; Iannaccone, Giuseppe
A 0.05 mm2, 350 mV, 14 nW fully-integrated temperature sensor in 180-nm CMOS
2021-01-01 Zambrano, B.; Garzon, E.; Strangio, S.; Crupi, F.; Lanuzza, M.
A Low-Voltage, Low-Power Reconfigurable Current-Mode Softmax Circuit for Analog Neural Networks
2021-01-01 Vatalaro, M.; Moposita, T.; Strangio, S.; Trojman, L.; Vladimirescu, A.; Lanuzza, M.; Crupi, F.
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| 12-bit Delta-Sigma ADC Operating at a Temperature of Up to 250 °C in Standard 0.18 μm SOI CMOS | 1-gen-2025 | Sbrana, Christian; Catania, Alessandro; Toschi, Tommaso; Strangio, Sebastiano; Iannaccone, Giuseppe | |
| A Physical Unclonable Function Based on a Differential Subthreshold PMOS Array with 9.73 × 10−4 Stabilized BER and 1.3 pJ/bit in 65 nm | 1-gen-2025 | Zambrano, Benjamin; Strangio, Sebastiano; Garzón, Esteban; Catania, Alessandro; Iannaccone, Giuseppe; Lanuzza, Marco | |
| High-Entropy Analog-Based Strong Physical Unclonable Function With Area-to-Entropy-Ratio of 166 F2/bit | 1-gen-2025 | Catania, Alessandro; Strangio, Sebastiano; Paliy, Maksym; Sbrana, Christian; Bertozzi, Michele; Iannaccone, Giuseppe | |
| High-Entropy Analog-Based Strong PUF Reaching 166 F2/Bit Area-to-Entropy-Ratio | 1-gen-2025 | Catania, Alessandro; Strangio, Sebastiano; Paliy, Maksym; Sbrana, Christian; Bertozzi, Michele; Iannaccone, Giuseppe | |
| Temperature-Resilient Analog Neuromorphic Chip in Single-Polysilicon CMOS Technology | 1-gen-2025 | Rizzo, Tommaso; Strangio, Sebastiano; Catania, Alessandro; Iannaccone, Giuseppe | |
| Data Loggers for High-Temperature Industrial Environments | 1-gen-2024 | Cecchi, Roberto; Catania, Alessandro; Sbrana, Christian; Macucci, Massimo; Strangio, Sebastiano; Iannaccone, Giuseppe | |
| Design Criteria of High-Temperature Integrated Circuits Using Standard SOI CMOS Process up to 300°C | 1-gen-2024 | Sbrana, Christian; Catania, Alessandro; Paliy, Maksym; Pascoli, Stefano Di; Strangio, Sebastiano; Macucci, Massimo; Iannaccone, Giuseppe | |
| High-Temperature 13-Bit Delta-Sigma ADC in Standard SOI CMOS Operating Up to 260°C | 1-gen-2024 | Sbrana, C.; Catania, A.; Toschi, T.; Strangio, S.; Iannaccone, G. | |
| A 2-D-Material FET Verilog-A Model for Analog Neuromorphic Circuit Design | 1-gen-2023 | Dubey, P. K.; Strangio, S.; Marin, E. G.; Iannaccone, G.; Fiori, G. | |
| Electromagnetic Design of an Inductive Wireless Power Transfer System for Endoscopic Capsule | 1-gen-2023 | Bandini, Gabriele; Buffi, Alice; Marracci, Mirko; Tellini, Bernardo; Rizzo, Tommaso; Macucci, Massimo; Strangio, Sebastiano; Iannaccone, Giuseppe | |
| Load Modulation Feedback in Adaptive Matching Networks for Low-Coupling Wireless Power Transfer Systems | 1-gen-2023 | Bertozzi, M.; Catania, A.; Bandini, G.; Strangio, S.; Iannaccone, G. | |
| The case for hybrid analog neuromorphic chips based on silicon and 2D materials | 1-gen-2023 | Iannaccone, G.; Rizzo, T.; Paliy, M.; Strangio, S. | |
| A 0.6V–1.8V Compact Temperature Sensor with 0.24 °C Resolution, ±1.4 °C Inaccuracy and 1.06 nJ per Conversion | 1-gen-2022 | Zambrano, B.; Garzon, E.; Strangio, S.; Iannaccone, G.; Lanuzza, M. | |
| A 6.78 MHz Maximum Efficiency Tracking Active Rectifier with Load Modulation Control for Wireless Power Transfer to Implantable Medical Devices | 1-gen-2022 | Rizzo, Tommaso; Catania, Alessandro; Bertolacci, Gabriele; Strangio, Sebastiano; Iannaccone, Giuseppe | |
| All-Analog Silicon Integration of Image Sensor and Neural Computing Engine for Image Classification | 1-gen-2022 | Zambrano, B.; Strangio, S.; Rizzo, T.; Garzon, E.; Lanuzza, M.; Iannaccone, G. | |
| Design of Ultra-Low Voltage/Power Circuits and Systems | 1-gen-2022 | Lanuzza, M.; De Rose, R.; Strangio, S. | |
| Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2 | 1-gen-2022 | Migliato Marega, G.; Wang, Z.; Paliy, M.; Giusi, G.; Strangio, S.; Castiglione, F.; Callegari, C.; Tripathi, M.; Radenovic, A.; Iannaccone, G.; Kis, A. | |
| Time Domain Analog Neuromorphic Engine Based on High-Density Non-Volatile Memory in Single-Poly CMOS | 1-gen-2022 | Rizzo, Tommaso; Strangio, Sebastiano; Iannaccone, Giuseppe | |
| A 0.05 mm2, 350 mV, 14 nW fully-integrated temperature sensor in 180-nm CMOS | 1-gen-2021 | Zambrano, B.; Garzon, E.; Strangio, S.; Crupi, F.; Lanuzza, M. | |
| A Low-Voltage, Low-Power Reconfigurable Current-Mode Softmax Circuit for Analog Neural Networks | 1-gen-2021 | Vatalaro, M.; Moposita, T.; Strangio, S.; Trojman, L.; Vladimirescu, A.; Lanuzza, M.; Crupi, F. |