TERRENI, PIERANGELO Statistiche
TERRENI, PIERANGELO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE
1/F-GAMMA NOISE IN THICK-FILM RESISTORS AS AN EFFECT OF TUNNEL AND THERMALLY ACTIVATED EMISSIONS, FROM MEASURES VERSUS FREQUENCY AND TEMPERATURE
1983-01-01 Pellegrini, Bruno; Saletti, Roberto; Terreni, Pierangelo; Prudenziati, M.
70-MHz 2-μm CMOS Bit-level Systolic Arrat Median Filter
1993-01-01 Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo
A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18 um CMOS with 5.8GHz ERBW
2006-01-01 Nuzzo, P; Van der Plas, G; De Bernardinis, R; Van der Perre, L; Gyselinckx, B; Terreni, Pierangelo
A 250-ps time-resolution CMOS multihit time-to-digital converter for nuclear physics experiments
1999-01-01 Bigongiari, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo
A 500 ps Time-to-Digital Converter (TDC) Integrated Circuit for Nuclear Physics Experiments, as a Result of University-Enterprises cooperation
1995-01-01 Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo; Bigongiari, A.; Lippi, M.
A DCT systolic chip for digital HDTV
1992-01-01 Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo
A digitally controlled shunt capacitor CMOS delay line
1997-01-01 Andreani, P.; Bigongiari, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo
A Digitally Controlled Shunt Capacitor CMOS Delay Line
1999-01-01 Andreani, P.; Bigongiari, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo
A Framework for Analog Platform Characterization
2004-01-01 De Bernardinis, F; Vincis, F; Gambini, S; Terreni, Pierangelo; Sangiovanni Vincentelli, A.
A new VLSI implementation of Additive Synthesis
1998-01-01 De Bernardinis, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo; Bertini, G.
A Novel Bit-Level Systolic Array Median Filter
1991-01-01 Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo
A Pyramid Vector Quantizer Chip for HDTV Applications
1997-01-01 Bellifemine, F.; Picco, R.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo
A QoS Internet Protocol Scheduler on the IXP1200 Network Platform
2003-01-01 DE BERNARDINIS, F.; Fanucci, Luca; Ramacciotti, T.; Terreni, Pierangelo
A Single Chip Adaptive Filter for Delta-Modulated Signals
1987-01-01 Terreni, Pierangelo; Roncella, Roberto; Saletti, Roberto
A single-chip 1,200 sinusoid real-time generator for additive synthesis of musical signals
1997-01-01 De Bernardinis, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo; Bertini, G.
A Software Defined Radio Transponder for Low-Orbit Satellite Communications
2012-01-01 Davalle, Daniele; Fanucci, Luca; Neri, Bruno; Saletti, Roberto; Saponara, Sergio; Terreni, Pierangelo
A useful application of CMOS ternary logic to the realization of asynchronous circuits
1997-01-01 Mariani, R.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo
A VLSI Systolic Filter with ternary coefficients for Delta-Modulated Signals
1988-01-01 Terreni, Pierangelo; Roncella, Roberto; Picchi, G.; Saletti, Roberto
Active balancing in hierarchical Battery Management Systems for large scale Li-ion batteries
2012-01-01 Baronti, Federico; Fantechi, G; Fanucci, Luca; Roncella, Roberto; Saletti, Roberto; Saponara, Sergio; Terreni, Pierangelo
Active balancing in hierarchical Battery Management Systems for large scale Li-ion batteries
2012-01-01 Baronti, Federico; Fantechi, G; Fanucci, Luca; Roncella, Roberto; Saletti, Roberto; Saponara, Sergio; Terreni, Pierangelo
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
1/F-GAMMA NOISE IN THICK-FILM RESISTORS AS AN EFFECT OF TUNNEL AND THERMALLY ACTIVATED EMISSIONS, FROM MEASURES VERSUS FREQUENCY AND TEMPERATURE | 1-gen-1983 | Pellegrini, Bruno; Saletti, Roberto; Terreni, Pierangelo; Prudenziati, M. | |
70-MHz 2-μm CMOS Bit-level Systolic Arrat Median Filter | 1-gen-1993 | Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo | |
A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18 um CMOS with 5.8GHz ERBW | 1-gen-2006 | Nuzzo, P; Van der Plas, G; De Bernardinis, R; Van der Perre, L; Gyselinckx, B; Terreni, Pierangelo | |
A 250-ps time-resolution CMOS multihit time-to-digital converter for nuclear physics experiments | 1-gen-1999 | Bigongiari, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo | |
A 500 ps Time-to-Digital Converter (TDC) Integrated Circuit for Nuclear Physics Experiments, as a Result of University-Enterprises cooperation | 1-gen-1995 | Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo; Bigongiari, A.; Lippi, M. | |
A DCT systolic chip for digital HDTV | 1-gen-1992 | Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo | |
A digitally controlled shunt capacitor CMOS delay line | 1-gen-1997 | Andreani, P.; Bigongiari, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo | |
A Digitally Controlled Shunt Capacitor CMOS Delay Line | 1-gen-1999 | Andreani, P.; Bigongiari, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo | |
A Framework for Analog Platform Characterization | 1-gen-2004 | De Bernardinis, F; Vincis, F; Gambini, S; Terreni, Pierangelo; Sangiovanni Vincentelli, A. | |
A new VLSI implementation of Additive Synthesis | 1-gen-1998 | De Bernardinis, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo; Bertini, G. | |
A Novel Bit-Level Systolic Array Median Filter | 1-gen-1991 | Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo | |
A Pyramid Vector Quantizer Chip for HDTV Applications | 1-gen-1997 | Bellifemine, F.; Picco, R.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo | |
A QoS Internet Protocol Scheduler on the IXP1200 Network Platform | 1-gen-2003 | DE BERNARDINIS, F.; Fanucci, Luca; Ramacciotti, T.; Terreni, Pierangelo | |
A Single Chip Adaptive Filter for Delta-Modulated Signals | 1-gen-1987 | Terreni, Pierangelo; Roncella, Roberto; Saletti, Roberto | |
A single-chip 1,200 sinusoid real-time generator for additive synthesis of musical signals | 1-gen-1997 | De Bernardinis, F.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo; Bertini, G. | |
A Software Defined Radio Transponder for Low-Orbit Satellite Communications | 1-gen-2012 | Davalle, Daniele; Fanucci, Luca; Neri, Bruno; Saletti, Roberto; Saponara, Sergio; Terreni, Pierangelo | |
A useful application of CMOS ternary logic to the realization of asynchronous circuits | 1-gen-1997 | Mariani, R.; Roncella, Roberto; Saletti, Roberto; Terreni, Pierangelo | |
A VLSI Systolic Filter with ternary coefficients for Delta-Modulated Signals | 1-gen-1988 | Terreni, Pierangelo; Roncella, Roberto; Picchi, G.; Saletti, Roberto | |
Active balancing in hierarchical Battery Management Systems for large scale Li-ion batteries | 1-gen-2012 | Baronti, Federico; Fantechi, G; Fanucci, Luca; Roncella, Roberto; Saletti, Roberto; Saponara, Sergio; Terreni, Pierangelo | |
Active balancing in hierarchical Battery Management Systems for large scale Li-ion batteries | 1-gen-2012 | Baronti, Federico; Fantechi, G; Fanucci, Luca; Roncella, Roberto; Saletti, Roberto; Saponara, Sergio; Terreni, Pierangelo |