This paper presents an ultra-low voltage, ultra-low power, inverter-based, discrete-time delta sigma modulator. The modulator employs a novel, two-stage, switched capacitor integrator that overcomes most of the issues introduced by ultra-low voltage inverter-like amplifiers. The effectiveness of the proposed approach is demonstrated by means of electrical simulation performed on a circuit designed in UMC 0.18 μm CMOS technology. With a supply voltage of only 0.3 V, the modulator reaches an SNDR of 69.9 dB for a signal bandwidth of 80 Hz and a clock frequency of 20 kHz. Thanks to a power consumption of only 15.47 nW, this analog-to-digital converter is suitable for interfacing a wide variety of sensors in energy harvesting applications. Different bandwidth-power consumption trade-offs are possible by moderate increase of the power supply voltage.

A 0.3 V 15 nW 69 dB SNDR Inverter-Based ΔΣ Modulator in 0.18 μm CMOS

Benvenuti L.;Catania A.;Cicalini M.;Ria A.;Piotto M.;Bruschi P.
2019

Abstract

This paper presents an ultra-low voltage, ultra-low power, inverter-based, discrete-time delta sigma modulator. The modulator employs a novel, two-stage, switched capacitor integrator that overcomes most of the issues introduced by ultra-low voltage inverter-like amplifiers. The effectiveness of the proposed approach is demonstrated by means of electrical simulation performed on a circuit designed in UMC 0.18 μm CMOS technology. With a supply voltage of only 0.3 V, the modulator reaches an SNDR of 69.9 dB for a signal bandwidth of 80 Hz and a clock frequency of 20 kHz. Thanks to a power consumption of only 15.47 nW, this analog-to-digital converter is suitable for interfacing a wide variety of sensors in energy harvesting applications. Different bandwidth-power consumption trade-offs are possible by moderate increase of the power supply voltage.
978-1-7281-3549-6
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11568/1016098
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