We propose a low cost and low intrusive approach to test on line the scheduler of high performance microprocessors. Differently from traditional approaches, it is based on looking for the information redundancy that the scheduler inherently has due to its performed functionality, rather than adding such a redundancy for on line test purposes. © 2010 author/owner(s).
Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors
Rossi D.
;
2010-01-01
Abstract
We propose a low cost and low intrusive approach to test on line the scheduler of high performance microprocessors. Differently from traditional approaches, it is based on looking for the information redundancy that the scheduler inherently has due to its performed functionality, rather than adding such a redundancy for on line test purposes. © 2010 author/owner(s).File in questo prodotto:
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