The Muon g-2 Experiment at Fermilab (E989) will measure the muon magnetic anomaly with unprecedented precision (0.14 ppm), which yields a factor of 4 improvement with respect to the previous measurements at Brookhaven National Laboratory (BNL) (E821). To achieve this goal, the relative response of each calorimeter channel must be calibrated and monitored at a level better than $10^{-3}$ in the time window of the muon fill. The calibration system uses a laser source and photodetectors. The data acquisition (DAQ) of the system is designed around two field-programmable gate array (FPGA)-based boards and a custom crate bus. The front-end board manages the photodetector operation and signal processing and performs a first-level data concentration task. Up to 12 FPGA boards can be housed in a 6U crate. A readout master controls the boards, implements event-building functionalities, manages the monitoring interface, and facilitates calibration and debugging tasks. A gigabit-ethernet interface is used to transfer data to the on-line farm for storage and further processing. Presently, the system is working at Fermi National Accelerator Laboratory (FNAL). In this article, we present the DAQ system design, run control user interface, and system evaluation.

Design and Performance of Data Acquisition and Control System for the Muon g-2 Laser Calibration

Driutti A.;Ferrari C.;Gioiosa A.;Incagli M.;Venanzoni G.
2020-01-01

Abstract

The Muon g-2 Experiment at Fermilab (E989) will measure the muon magnetic anomaly with unprecedented precision (0.14 ppm), which yields a factor of 4 improvement with respect to the previous measurements at Brookhaven National Laboratory (BNL) (E821). To achieve this goal, the relative response of each calorimeter channel must be calibrated and monitored at a level better than $10^{-3}$ in the time window of the muon fill. The calibration system uses a laser source and photodetectors. The data acquisition (DAQ) of the system is designed around two field-programmable gate array (FPGA)-based boards and a custom crate bus. The front-end board manages the photodetector operation and signal processing and performs a first-level data concentration task. Up to 12 FPGA boards can be housed in a 6U crate. A readout master controls the boards, implements event-building functionalities, manages the monitoring interface, and facilitates calibration and debugging tasks. A gigabit-ethernet interface is used to transfer data to the on-line farm for storage and further processing. Presently, the system is working at Fermi National Accelerator Laboratory (FNAL). In this article, we present the DAQ system design, run control user interface, and system evaluation.
2020
Mastroianni, S.; Anastasio, A.; Bedeschi, F.; Boiano, A.; Cantatore, G.; Cauz, D.; Corradi, G.; Dabagov, S.; Di Meo, P.; Driutti, A.; Di Sciascio, G.;...espandi
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/1126068
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