A 3-decade-frequency-range Sinewave Synthesizer with Analog Piecewise-linear Interpolation

In this work, we present a novel approach for the on-chip synthesis of sinusoidal signals for low-size and low-power applications. The original aspect of the proposed solution is the ability to generate linearly interpolated signals by means of analog interpolation. This gives rise to notable distortion performances with a low circuit complexity. The potentiality of the proposed approach was verified by means of electrical simulations performed on a prototype designed with a standard 0.18 µ m CMOS process. A THD as low as 0.59%, calculated considering also the aliasing effect implied by the linear interpolation, was obtained at a 100 kHz sinewave frequency. The power consumption is around 300 µ W. The possibility of varying the sinewave frequency in a 3-decade wide range was also assessed. Results obtained from 50 Monte Carlo runs at f0=100 kHz indicated a worst-case THD around 1.3%.