Wide-Scan and Energy-Saving Phased Arrays by Exploiting Penrose Tiling Subarrays

A partitioning scheme based on Penrose-inspired subarrays is proposed for wide-scan planar phased arrays. The regular triangular lattice adopted for the arrangement of the antenna elements is organized into irregularly-shaped tiles that exploit the properties offered by the Penrose tessellation. The novel array architecture ensures a remarkable reduction of the Transmit/Receive modules without harming the scan angle range and peak side lobe level thanks to the optimization based on the Pareto front that is able to tackle conflicting objectives. The performance of the proposed approach are assessed in different scenarios and prove the robustness and flexibility of the new tiling architecture. Moreover, a thorough analysis is carried out to highlight the unique feature of the partition scheme of offering a noteworthy reduction of the energy consumption.