: The strong reduction of thermal conductivity with respect to bulk silicon makes nanostructured silicon one of the best materials for highly efficient direct conversion of heat into electrical power and vice-versa. The widespread technologies for the integration of silicon devices can be used to define on-chip micro thermoelectric generators (scavengers); similar structures could also be used for precise and well-localized cooling through the reverse process of heat pumping. However, the road to the fabrication of integrated thermal energy scavengers or cooler, based on silicon, is still very long. In this work, the design and the fabrication process of on-chip thermoelectric devices based on a large number of interconnected monocrystalline silicon nanobeams, very tall (>1 µm) and thin (less than 200 nanometers), arranged in large areas combs is shown. The small width of the nanobeams gives a reduced thermal conductivity, and the height perpendicular to the substrate allows the definition of a highly dense collection of nanostructures. The total cross-section is far broader than that of other nanostructures, a characteristic that guarantees both mechanical stability and larger deliverable power per unit area.
On‐Chip Thermoelectric Devices Based on Standard Silicon Processing
Elisabetta Dimaggio
;Antonella Masci;Amedeo De Seta;Giovanni Pennelli
2024-01-01
Abstract
: The strong reduction of thermal conductivity with respect to bulk silicon makes nanostructured silicon one of the best materials for highly efficient direct conversion of heat into electrical power and vice-versa. The widespread technologies for the integration of silicon devices can be used to define on-chip micro thermoelectric generators (scavengers); similar structures could also be used for precise and well-localized cooling through the reverse process of heat pumping. However, the road to the fabrication of integrated thermal energy scavengers or cooler, based on silicon, is still very long. In this work, the design and the fabrication process of on-chip thermoelectric devices based on a large number of interconnected monocrystalline silicon nanobeams, very tall (>1 µm) and thin (less than 200 nanometers), arranged in large areas combs is shown. The small width of the nanobeams gives a reduced thermal conductivity, and the height perpendicular to the substrate allows the definition of a highly dense collection of nanostructures. The total cross-section is far broader than that of other nanostructures, a characteristic that guarantees both mechanical stability and larger deliverable power per unit area.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.