Enabling the Hardware Acceleration of Residual Layers within the FPG-AI Framework for Space Applications

Artificial Intelligence, particularly Convolutional Neural Networks (CNNs), plays a key role in satellite image processing, enabling tasks such as object detection, classification, and change detection. Deploying CNNs on space-qualified edge devices, such as Field-Programmable Gate Arrays (FPGAs), pro-vides advantages like re-programmability and high performance but constitutes a challenging task due to resource limitations and power consumption. FPG-AI, a toolflow for the automatic generation of FPGA-based DNN accelerators, addresses these challenges by optimizing hardware architecture and leveraging model compression techniques. However, its current implementation lacks support for residual layers, which are essential for deeper networks and improved accuracy in Earth Observation applications. This work extends FPG-AI to incorporate residual layers, requiring modifications to logic blocks and Direct Memory Access (DMA) mechanisms. Residual layer processing involves storing intermediate activations in DDR memory and enabling specialized hardware blocks for efficient computation. The simulation results confirm proper functionality, with minor trade-offs in power consumption, resource utilization, and timing. Despite a slight increase in resource usage and a marginal decrease in timing performance, the extended framework improves the ability of FPG-AI to support advanced CNN architectures, making it more suitable for computationally demanding satellite applications.