NANNIPIERI, PIETRO Statistiche
NANNIPIERI, PIETRO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE
CGR-AI Engine: A scalable CGRA-based processing platform for Artificial Intelligence in space applications
2026-01-01 Zulberti, Luca; Monopoli, Matteo; Mystkowska, Gabriela; Monorchio, Andrea; Moranti, Silvia; Fanucci, Luca; Nannipieri, Pietro
A Robust and Portable All-Digital TRNG Circuit for Extending the Instruction Set Architecture of RISC-V Processors
2025-01-01 Crocetti, Luca; Noccetti, Ettore; Nannipieri, Pietro; Di Matteo, Stefano; Sarno, Ivan; Saponara, Sergio
Edge AI Acceleration for Critical Systems: From FPGA Hardware to CGRA Technology
2025-01-01 Nannipieri, P.; Zulberti, L.; Pacini, T.; Monopoli, M.; Bocchi, T.; Fanucci, L.
Efficient Coarse-Grained Reconfigurable Array architecture for machine learning applications in space using DARE65T library platform
2025-01-01 Zulberti, L.; Monopoli, M.; Nannipieri, P.; Moranti, S.; Thys, G.; Fanucci, L.
Enabling the Hardware Acceleration of Residual Layers within the FPG-AI Framework for Space Applications
2025-01-01 Ciacchini, Lorenzo; Bocchi, Tommaso; Pacini, Tommaso; Nannipieri, Pietro; Fanucci, Luca
Extension to Vector Operations of a Soft GPU Core for Machine Learning Acceleration in Space
2025-01-01 Monopoli, Matteo; Deiana, Daniel; Benelli, Gionata; Nannipieri, Pietro; Lettieri, Giuseppe; Fanucci, Luca
FPG-AI for On-Board AI Acceleration: A Case Study for Semantic Segmentation of Maritime and Terrestrial Areas
2025-01-01 Bocchi∗, Tommaso; Ciacchini∗, Lorenzo; Nannipieri∗, Pietro; Pacini∗, Tommaso; Tancredi†, Claudio; Francesco Tosetti† Francesco Rossi†, ; Bloise†, Ilaria; Armando La Rocca†, ; Fontana†, Federico; Fanucci∗, Luca
FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs
2025-01-01 Pacini, T.; Nannipieri, P.; Moranti, S.; Fanucci, L.
FPGA Prototype of CGR-AI Engine for Space Systems: Step Towards UDSM Implementation
2025-01-01 Mystkowska, Gabriela; Monopoli, Matteo; Nannipieri, Pietro; Fanucci, Luca; Merodio Codinachs, David
Hardware Platforms Enabling Edge AI for Space Applications: A Critical Review
2025-01-01 Mystkowska, G.; Monopoli, M.; Nannipieri, P.; Zulberti, L.; Merodio Codinachs, D.; Fanucci, L.
RADSAFiE: A Netlist-Level Fault Injection User Interface Application for FPGA-Based Digital Systems
2025-01-01 Monopoli, M.; Biondi, M.; Nannipieri, P.; Moranti, S.; Fanucci, L.
Toward Reliable Onboard AI in Space: A Fault-Tolerant Soft GPU-Based System-on-Chip
2025-01-01 Monopoli, M.; Biondi, M.; Moranti, S.; Nannipieri, P.; Fanucci, L.
A PUF-Based Secure Boot for RISC-V Architectures
2024-01-01 DI MATTEO, Stefano; Zulberti, Luca; Cosimo Lapenna, Federico; Nannipieri, Pietro; Crocetti, Luca; Fanucci, Luca; Saponara, Sergio
Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative
2024-01-01 Nannipieri, Pietro; DI MATTEO, Stefano; Crocetti, Luca; Zulberti, Luca; Fanucci, Luca; Saponara, Sergio
Design and Implementation of a Configurable Fully Compliant DVB-S2 LDPC Encoder for High Data-Rate Downlink Payload
2024-01-01 Nannipieri, P.; Bartolacci, G.; Bertolucci, M.; Fanucci, L.
Flexible Precision Vector Extension for Energy Efficient Coarse-Grained Reconfigurable Array AI-Engine
2024-01-01 Mystkowska, G.; Zulberti, L.; Monopoli, M.; Nannipieri, P.; Fanucci, L.
Integration of Twin Models in UVM Verification IPs for Space Telecommunication Systems
2024-01-01 Vagaggini, Simone; Davalle, Daniele; Nannipieri, Pietro; Fanucci, Luca
SmartDMA: Adaptable Memory Access Controller for CGRA-based Processing Systems
2024-01-01 Zulberti, L.; Monorchio, A.; Monopoli, M.; Mystkowska, G.; Nannipieri, P.; Fanucci, L.
Design and Implementation of a DVB-S2 Reconfigurable Datapath BCH Encoder for High Data-Rate Payload Data Telemetry
2023-01-01 Quintarelli, G; Bertolucci, M; Nannipieri, P
Design Methodology and Metrics for Robust and Highly Qualified Security Modules in Trusted Environments
2023-01-01 Crocetti, Luca; Nannipieri, Pietro; Di Matteo, Stefano; Saponara, Sergio
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| CGR-AI Engine: A scalable CGRA-based processing platform for Artificial Intelligence in space applications | 1-gen-2026 | Zulberti, Luca; Monopoli, Matteo; Mystkowska, Gabriela; Monorchio, Andrea; Moranti, Silvia; Fanucci, Luca; Nannipieri, Pietro | |
| A Robust and Portable All-Digital TRNG Circuit for Extending the Instruction Set Architecture of RISC-V Processors | 1-gen-2025 | Crocetti, Luca; Noccetti, Ettore; Nannipieri, Pietro; Di Matteo, Stefano; Sarno, Ivan; Saponara, Sergio | |
| Edge AI Acceleration for Critical Systems: From FPGA Hardware to CGRA Technology | 1-gen-2025 | Nannipieri, P.; Zulberti, L.; Pacini, T.; Monopoli, M.; Bocchi, T.; Fanucci, L. | |
| Efficient Coarse-Grained Reconfigurable Array architecture for machine learning applications in space using DARE65T library platform | 1-gen-2025 | Zulberti, L.; Monopoli, M.; Nannipieri, P.; Moranti, S.; Thys, G.; Fanucci, L. | |
| Enabling the Hardware Acceleration of Residual Layers within the FPG-AI Framework for Space Applications | 1-gen-2025 | Ciacchini, Lorenzo; Bocchi, Tommaso; Pacini, Tommaso; Nannipieri, Pietro; Fanucci, Luca | |
| Extension to Vector Operations of a Soft GPU Core for Machine Learning Acceleration in Space | 1-gen-2025 | Monopoli, Matteo; Deiana, Daniel; Benelli, Gionata; Nannipieri, Pietro; Lettieri, Giuseppe; Fanucci, Luca | |
| FPG-AI for On-Board AI Acceleration: A Case Study for Semantic Segmentation of Maritime and Terrestrial Areas | 1-gen-2025 | Bocchi∗, Tommaso; Ciacchini∗, Lorenzo; Nannipieri∗, Pietro; Pacini∗, Tommaso; Tancredi†, Claudio; Francesco Tosetti† Francesco Rossi†, ; Bloise†, Ilaria; Armando La Rocca†, ; Fontana†, Federico; Fanucci∗, Luca | |
| FPG-AI RNN: A Technology-Agnostic Framework for the Automatic Acceleration of LSTM/GRU-Based Models on FPGAs | 1-gen-2025 | Pacini, T.; Nannipieri, P.; Moranti, S.; Fanucci, L. | |
| FPGA Prototype of CGR-AI Engine for Space Systems: Step Towards UDSM Implementation | 1-gen-2025 | Mystkowska, Gabriela; Monopoli, Matteo; Nannipieri, Pietro; Fanucci, Luca; Merodio Codinachs, David | |
| Hardware Platforms Enabling Edge AI for Space Applications: A Critical Review | 1-gen-2025 | Mystkowska, G.; Monopoli, M.; Nannipieri, P.; Zulberti, L.; Merodio Codinachs, D.; Fanucci, L. | |
| RADSAFiE: A Netlist-Level Fault Injection User Interface Application for FPGA-Based Digital Systems | 1-gen-2025 | Monopoli, M.; Biondi, M.; Nannipieri, P.; Moranti, S.; Fanucci, L. | |
| Toward Reliable Onboard AI in Space: A Fault-Tolerant Soft GPU-Based System-on-Chip | 1-gen-2025 | Monopoli, M.; Biondi, M.; Moranti, S.; Nannipieri, P.; Fanucci, L. | |
| A PUF-Based Secure Boot for RISC-V Architectures | 1-gen-2024 | DI MATTEO, Stefano; Zulberti, Luca; Cosimo Lapenna, Federico; Nannipieri, Pietro; Crocetti, Luca; Fanucci, Luca; Saponara, Sergio | |
| Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative | 1-gen-2024 | Nannipieri, Pietro; DI MATTEO, Stefano; Crocetti, Luca; Zulberti, Luca; Fanucci, Luca; Saponara, Sergio | |
| Design and Implementation of a Configurable Fully Compliant DVB-S2 LDPC Encoder for High Data-Rate Downlink Payload | 1-gen-2024 | Nannipieri, P.; Bartolacci, G.; Bertolucci, M.; Fanucci, L. | |
| Flexible Precision Vector Extension for Energy Efficient Coarse-Grained Reconfigurable Array AI-Engine | 1-gen-2024 | Mystkowska, G.; Zulberti, L.; Monopoli, M.; Nannipieri, P.; Fanucci, L. | |
| Integration of Twin Models in UVM Verification IPs for Space Telecommunication Systems | 1-gen-2024 | Vagaggini, Simone; Davalle, Daniele; Nannipieri, Pietro; Fanucci, Luca | |
| SmartDMA: Adaptable Memory Access Controller for CGRA-based Processing Systems | 1-gen-2024 | Zulberti, L.; Monorchio, A.; Monopoli, M.; Mystkowska, G.; Nannipieri, P.; Fanucci, L. | |
| Design and Implementation of a DVB-S2 Reconfigurable Datapath BCH Encoder for High Data-Rate Payload Data Telemetry | 1-gen-2023 | Quintarelli, G; Bertolucci, M; Nannipieri, P | |
| Design Methodology and Metrics for Robust and Highly Qualified Security Modules in Trusted Environments | 1-gen-2023 | Crocetti, Luca; Nannipieri, Pietro; Di Matteo, Stefano; Saponara, Sergio |