This paper introduces scNoCSim (Service Curve-based NoC Simulator), a network-on-chip simulator with integrated monitoring capabilities, built on the omnetpp (OMNeT++) framework. The scNoCSim offers unique features for simulating heterogeneous wormhole Network-on-Chips (NoCs) with monitoring facilities, varying numbers of virtual channels for each unidirectional port, and flexible link capacities. The proposed simulator is extensible and scalable by adding more modules, and highly customizable through editable parameters. It is designed for Network-on-Chip modeling and offers various deterministic routing algorithms (XY, YX, XY–YX, Odd-Even, and O1Turn). It supports round-robin, weighted round-robin, and fixed-priority scheduling strategies; credit-based traffic flow control; and both centralized and distributed routing techniques, including realistic and ideal routers. This simulator offers a comprehensive set of analyses at both packet and flit levels, including, throughput, end-to-end delay, data transfer delay, required bandwidth estimation, link utilization, traffic packet success and loss rates, etc. This paper outlines the proposed architectural view, network design, functional structure, and modules, as well as the key attributes that make it ideal for progressive Network-on-Chip research. Additionally, Network Calculus is used to determine performance (delay and backlog) bounds for worst-case scenarios, estimate bandwidth, and present case studies with validation that demonstrate the capabilities of the scNoCSim simulator in scenarios that cannot be addressed by existing Network-on-Chip research.

A novel simulator for performance analysis in heterogeneous wormhole Network-on-Chips

Islam, Md Amirul;Stea, Giovanni
2026-01-01

Abstract

This paper introduces scNoCSim (Service Curve-based NoC Simulator), a network-on-chip simulator with integrated monitoring capabilities, built on the omnetpp (OMNeT++) framework. The scNoCSim offers unique features for simulating heterogeneous wormhole Network-on-Chips (NoCs) with monitoring facilities, varying numbers of virtual channels for each unidirectional port, and flexible link capacities. The proposed simulator is extensible and scalable by adding more modules, and highly customizable through editable parameters. It is designed for Network-on-Chip modeling and offers various deterministic routing algorithms (XY, YX, XY–YX, Odd-Even, and O1Turn). It supports round-robin, weighted round-robin, and fixed-priority scheduling strategies; credit-based traffic flow control; and both centralized and distributed routing techniques, including realistic and ideal routers. This simulator offers a comprehensive set of analyses at both packet and flit levels, including, throughput, end-to-end delay, data transfer delay, required bandwidth estimation, link utilization, traffic packet success and loss rates, etc. This paper outlines the proposed architectural view, network design, functional structure, and modules, as well as the key attributes that make it ideal for progressive Network-on-Chip research. Additionally, Network Calculus is used to determine performance (delay and backlog) bounds for worst-case scenarios, estimate bandwidth, and present case studies with validation that demonstrate the capabilities of the scNoCSim simulator in scenarios that cannot be addressed by existing Network-on-Chip research.
2026
Islam, Md Amirul; Stea, Giovanni
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/1347650
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