Electro-thermal simulation of hot-spot phenomena in cellular bipolar power transistors: the influence of package thermal resistance

The cellular power transistors are affected by the hot spot phenomenon, a current crowding within few cells occurring for high power conditions, which decreases the device operating range. The onset of this phenomenon was studied under a wide range of electrical and thermal boundary conditions by means of a fast electro-thermal simulation procedure operating in the steady-state regime and using explicit analytical relationships for the temperature mapping. The power threshold of hot spot and the localization of its birth site were studied as a function of the metal layout. In particular the role of the packaging thermal resistance in determining the hot spot properties was highlighted.