Modern automotive electronic systems are based on distributed nets of smart IC sensors, typically implemented as mixed-signal ASICs. Beside the sensing device also the analog front-end, the A/D converter and some DSP processing tasks are integrated in a single-chip. A key issue for these micro-systems is a cost-effective communication with the off-chip Electronic Control Unit (ECU) for correct managing of relative actuators. Due to the limited amount of space and to reduce costs, automotive sensor chips are often pin-limited. An efficient communication between the IC and off-chip devices can be implemented by an internal bus re-mapping on a low-frequency pin-limited external bus. This article presents the complete design of an IP bridge and its implementation in a real smart sensor system on BCD technology. The IP bridge is based on bi-synchronous FIFO structures for frequency conversion and involves a custom protocol for cost-effective data transmission on a low frequency and low width bus.
AHB-Compliant Bridge with Programmable Frequency Downscaling for Efficient off Chip Digital Communication of Pin-limited Automotive Smart IC Sensors
SAPONARA, SERGIO;FANUCCI, LUCA
2010-01-01
Abstract
Modern automotive electronic systems are based on distributed nets of smart IC sensors, typically implemented as mixed-signal ASICs. Beside the sensing device also the analog front-end, the A/D converter and some DSP processing tasks are integrated in a single-chip. A key issue for these micro-systems is a cost-effective communication with the off-chip Electronic Control Unit (ECU) for correct managing of relative actuators. Due to the limited amount of space and to reduce costs, automotive sensor chips are often pin-limited. An efficient communication between the IC and off-chip devices can be implemented by an internal bus re-mapping on a low-frequency pin-limited external bus. This article presents the complete design of an IP bridge and its implementation in a real smart sensor system on BCD technology. The IP bridge is based on bi-synchronous FIFO structures for frequency conversion and involves a custom protocol for cost-effective data transmission on a low frequency and low width bus.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
