This brief presents an application-specific instruction-set processor (ASIP) for real-time Retinex image and video filtering. Design optimizations are addressed at algorithmic and architectural levels, the latter including a dedicated memory structure, an adapted pipeline, bypasses, a custom address generator and special looping structures. Synthesized in CMOS technology, the ASIP stands for its better energy-flexibility tradeoff versus reference ASIC and digital signal processing Retinex implementations.

Application-specific instruction-set processor for Retinex-like image and video processing

SAPONARA, SERGIO;FANUCCI, LUCA;
2007-01-01

Abstract

This brief presents an application-specific instruction-set processor (ASIP) for real-time Retinex image and video filtering. Design optimizations are addressed at algorithmic and architectural levels, the latter including a dedicated memory structure, an adapted pipeline, bypasses, a custom address generator and special looping structures. Synthesized in CMOS technology, the ASIP stands for its better energy-flexibility tradeoff versus reference ASIC and digital signal processing Retinex implementations.
2007
Saponara, Sergio; Fanucci, Luca; Marsi, S; Ramponi, G; Kammler, D; Witte, E. M.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/194573
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