A Digital-to-Time Converter (DTC) based on a Delay-Locked Loop (DLL) for phase interpolation in Direct Digital Synthesis (DDS) applications is described. The conversion is made in two steps using digitally controllable delay cells with configurable shunt-capacitors load. The circuit is able to interpolate a 120 MHz clock, generating a delay proportional to an 8-bit digital control word with 32 ps resolution. The DDS system clock frequency is thus virtually enhanced up to about 30 GHz, achieving a strong reduction of the spurious component level. The 256 level interpolation is achieved using only 35 delay elements (excluding dummy cells).

A high-resolution DLL-based digital-to-time converter for DDS applications

BARONTI, FEDERICO;FANUCCI, LUCA;RONCELLA, ROBERTO;SALETTI, ROBERTO
2002

Abstract

A Digital-to-Time Converter (DTC) based on a Delay-Locked Loop (DLL) for phase interpolation in Direct Digital Synthesis (DDS) applications is described. The conversion is made in two steps using digitally controllable delay cells with configurable shunt-capacitors load. The circuit is able to interpolate a 120 MHz clock, generating a delay proportional to an 8-bit digital control word with 32 ps resolution. The DDS system clock frequency is thus virtually enhanced up to about 30 GHz, achieving a strong reduction of the spurious component level. The 256 level interpolation is achieved using only 35 delay elements (excluding dummy cells).
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/206229
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