An adiabatic logic family is presented, which makes use of a CMOS positive feedback amplfier. The gate is based on dual rail logic and a cascade of such gates only needs three power/clock lines to operate. The positive feedback amplifier ensures high noise immunity and takes part in the energy recovery process.
Positive feedback adiabatic logic
DI PASCOLI, STEFANO;
1996-01-01
Abstract
An adiabatic logic family is presented, which makes use of a CMOS positive feedback amplfier. The gate is based on dual rail logic and a cascade of such gates only needs three power/clock lines to operate. The positive feedback amplifier ensures high noise immunity and takes part in the energy recovery process.File in questo prodotto:
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