The MEG experiment at PSI is searching for the μ+ e +γ decay with a sensitivity B(μ+ e +γ) ≈ 5 × 10-13 on its branching ratio. The world's most intense continuous muon beam (up to 108μ +/s) is stopped on a thin target, and e+γ pairs must be collected and measured. An effective on-line event selection system (trigger), able to suppress the huge beam-related background, while preserving the signal efficiency, is mandatory. A digital approach is adopted in order to accomplish this objective. Detector signals are processed on-line to perform an adequate event reconstruction, within a 450 ns latency, by means of Field Programmable Gate Arrays (FPGA). This approach is flexible enough to allow the acquisition of calibration events in parallel with the main data stream so as to monitor the detector behaviour throughout the run. In this paper we describe the implementation of the trigger algorithms on the FPGA, and their resolutions and efficiencies as well. Each observable used in the on-line event selection is described in details, together with the firmware implementation of the algorithms. We finally show how this arrangement provides the experiment with an effective trigger system fulfilling all the requirements and leading to an overall DAQ efficiency close to 100%.

Operation and performance of the trigger system of the MEG experiment

CEI, FABRIZIO;NICOLO', DONATO;Papa A.;
2014-01-01

Abstract

The MEG experiment at PSI is searching for the μ+ e +γ decay with a sensitivity B(μ+ e +γ) ≈ 5 × 10-13 on its branching ratio. The world's most intense continuous muon beam (up to 108μ +/s) is stopped on a thin target, and e+γ pairs must be collected and measured. An effective on-line event selection system (trigger), able to suppress the huge beam-related background, while preserving the signal efficiency, is mandatory. A digital approach is adopted in order to accomplish this objective. Detector signals are processed on-line to perform an adequate event reconstruction, within a 450 ns latency, by means of Field Programmable Gate Arrays (FPGA). This approach is flexible enough to allow the acquisition of calibration events in parallel with the main data stream so as to monitor the detector behaviour throughout the run. In this paper we describe the implementation of the trigger algorithms on the FPGA, and their resolutions and efficiencies as well. Each observable used in the on-line event selection is described in details, together with the firmware implementation of the algorithms. We finally show how this arrangement provides the experiment with an effective trigger system fulfilling all the requirements and leading to an overall DAQ efficiency close to 100%.
2014
Galli, L.; Baldini, A.; Cattaneo, P. W.; Cei, Fabrizio; De Gerone, M.; Dussoni, S.; Gatti, F.; Grassi, M.; Morsani, F.; Nicolo', Donato; Papa, A.; Ritt, S.; Signorelli, G.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/501486
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