In this paper we present the successful application of Prime Factor Algorithm FFT (Fast Fourier Transform) and pruning techniques to achieve low complexity UTRA-TDD detection. This approach has been applied to the Minimum Mean Square Error-Block Linear Equalizer (MMSE-BLE) receiver and to an MMSE equalizer specially designed for the downlink after their proper reformulation in the frequency domain. A complexity reduction of nearly 50% with respect to the classical 2(n) length FFT solutions has been demonstrated, without any performance loss. A more parallelizable VLSI architecture can be derived thanks to the modularity of the introduced FFT algorithms. Performances comparison has been carried out to confirm the validity of the proposed methods.

Low complexity detection for UTRA-TDD receivers

FANUCCI, LUCA;
2004-01-01

Abstract

In this paper we present the successful application of Prime Factor Algorithm FFT (Fast Fourier Transform) and pruning techniques to achieve low complexity UTRA-TDD detection. This approach has been applied to the Minimum Mean Square Error-Block Linear Equalizer (MMSE-BLE) receiver and to an MMSE equalizer specially designed for the downlink after their proper reformulation in the frequency domain. A complexity reduction of nearly 50% with respect to the classical 2(n) length FFT solutions has been demonstrated, without any performance loss. A more parallelizable VLSI architecture can be derived thanks to the modularity of the introduced FFT algorithms. Performances comparison has been carried out to confirm the validity of the proposed methods.
2004
Fanucci, Luca; Grasso, R.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/84793
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