NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34 Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack protocol offloading module, making it suitable for building low-latency, real-time GPU-based computing systems. We provide a detailed description of the NaNet hardware modular architecture. Benchmarks for latency and bandwidth for GbE and APElink channels are presented, followed by a performance analysis on the case study of the GPU-based low level trigger for the RICH detector in the NA62 CERN experiment, using either the NaNet GbE and APElink channels. Finally, we give an outline of project future activities.© CERN 2014.

NaNet: A flexible and configurable low-latency NIC for real-time trigger systems based on GPUs

LAMANNA, GIANLUCA;SOZZI, MARCO STANISLAO;
2014

Abstract

NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34 Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack protocol offloading module, making it suitable for building low-latency, real-time GPU-based computing systems. We provide a detailed description of the NaNet hardware modular architecture. Benchmarks for latency and bandwidth for GbE and APElink channels are presented, followed by a performance analysis on the case study of the GPU-based low level trigger for the RICH detector in the NA62 CERN experiment, using either the NaNet GbE and APElink channels. Finally, we give an outline of project future activities.© CERN 2014.
Ammendola, R.; Biagioni, A.; Frezza, O.; Lamanna, Gianluca; Lonardo, A; Cicero, F. L. o.; Paolucci, P. S.; Pantaleo, F.; Rossetti, D.; Simula, F.; Sozzi, MARCO STANISLAO; Tosoratto, L.; Vicini, P.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11568/861094
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