In this brief, we introduce an ultra-low voltage, ultra-low power, inverter-based, discrete-time, 1st order ${Delta } {Sigma }$ modulator. It exploits an original switched-capacitor integrator to achieve interesting performances with supply voltages as low as 0.25 V. It also employs a clock-boosting technique to improve pass-gate operation. A prototype has been designed and produced using a 0.18 $mu ext{m}$ CMOS process by UMC. The modulator reaches an SNDR of 37.2 dB at a voltage of 0.25 V, with a power consumption of only 2.1 nW, corresponding to a FOM of 140.3 dB. The DC characteristics show an offset of 4.3 mV, a gain error of 2.5% (standard deviations), with an INL of 0.6%.
A 2 nW 0.25 v 140 dB-FOM Inverter-Based First Order ΔΣ Modulator
Catania A.;Ria A.;Manfredini G.;Piotto M.;Bruschi P.
2020-01-01
Abstract
In this brief, we introduce an ultra-low voltage, ultra-low power, inverter-based, discrete-time, 1st order ${Delta } {Sigma }$ modulator. It exploits an original switched-capacitor integrator to achieve interesting performances with supply voltages as low as 0.25 V. It also employs a clock-boosting technique to improve pass-gate operation. A prototype has been designed and produced using a 0.18 $mu ext{m}$ CMOS process by UMC. The modulator reaches an SNDR of 37.2 dB at a voltage of 0.25 V, with a power consumption of only 2.1 nW, corresponding to a FOM of 140.3 dB. The DC characteristics show an offset of 4.3 mV, a gain error of 2.5% (standard deviations), with an INL of 0.6%.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
