Integrated logic circuits require transistors that have a sufficiently high mobility, but also a high current on/off ratio. In this respect, two-dimensional (2D) molybdenum disulfide (MoS 2 ) has been demonstrated as a suitable channel material for n-type field-effect transistors (FETs) with high performance. Single-layer graphene (SLG) has been shown to reduce contact resistance in such MoS 2 devices [2], [3]. Here, we experimentally demonstrate a scalable method for low resistivity contacts to MoS 2 using only chemical vapor deposited (CVD)-grown SLG, corroborated through simulations that explore the scalability potential of contact resistance optimization based on this approach.

MoS2/graphene Lateral Heterostructure Field Effect Transistors

Leonardo Lucchesi;Damiano Marian;Gianluca Fiori;Giuseppe Iannaccone;
2021-01-01

Abstract

Integrated logic circuits require transistors that have a sufficiently high mobility, but also a high current on/off ratio. In this respect, two-dimensional (2D) molybdenum disulfide (MoS 2 ) has been demonstrated as a suitable channel material for n-type field-effect transistors (FETs) with high performance. Single-layer graphene (SLG) has been shown to reduce contact resistance in such MoS 2 devices [2], [3]. Here, we experimentally demonstrate a scalable method for low resistivity contacts to MoS 2 using only chemical vapor deposited (CVD)-grown SLG, corroborated through simulations that explore the scalability potential of contact resistance optimization based on this approach.
2021
978-1-6654-1240-7
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/1134861
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