A circuit for a four-phase trapezoidal power clock generator for adiabatic logic circuits realised with a double-well 0.25 um CMOS technology and extemal inductors is proposed. The circuit, at a frequency of 7 MHz which is within the optimum frequency range for adiabatic circuits realised with 0.25 um CMOS technology, has a conversion efficiency higher than 80%, and is robust with respect to parameter variations.

Four-phase power clock generator for adiabatic logic circuits

IANNACCONE, GIUSEPPE;DI PASCOLI, STEFANO;
2002-01-01

Abstract

A circuit for a four-phase trapezoidal power clock generator for adiabatic logic circuits realised with a double-well 0.25 um CMOS technology and extemal inductors is proposed. The circuit, at a frequency of 7 MHz which is within the optimum frequency range for adiabatic circuits realised with 0.25 um CMOS technology, has a conversion efficiency higher than 80%, and is robust with respect to parameter variations.
2002
A., BARGAGLI STOFFI; Iannaccone, Giuseppe; DI PASCOLI, Stefano; E., Amirante; D., SCHMITT LANDSIEDEL
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11568/184460
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