This work presents fabrication processes of nanostructures on a top silicon layer of silicon on insulator substrates. These processes rely on the properties shown by a trapezoidal cross section, as the one obtained by anisotropic wet etching, when reduced by dry oxidation. As demonstrated by numerical simulations, oxide stress limits the oxidation process if the minor base is large enough, compared with the thickness. If instead the minor base is small, a triangular section is generated during the oxidation process and a controlled strong reduction of the cross section, until the nanometer range is possible. The fabrication of a silicon nanowire longer than 1.5 mu m and with a cross section of 15 nm, obtained with this technique, is shown and demonstrated. By providing zones with different initial cross section dimensions, constrictions can be fabricated in suitable positions and controlled by oxidation reduction, so that tunnel barriers can be obtained. Room temperature electrical characterization of tunneling structures, based on this fabrication technique, is presented and discussed. (c) 2007 American Institute of Physics.
|Autori:||Pennelli G; Pellegrini B|
|Titolo:||Fabrication of silicon nanostructures by geometry controlled oxidation|
|Anno del prodotto:||2007|
|Digital Object Identifier (DOI):||10.1063/1.2722252|
|Appare nelle tipologie:||1.1 Articolo in rivista|