RAPUANO, EMILIO
 Distribuzione geografica
Continente #
NA - Nord America 147
EU - Europa 128
AS - Asia 57
AF - Africa 9
SA - Sud America 1
Totale 342
Nazione #
US - Stati Uniti d'America 147
IT - Italia 73
SE - Svezia 35
SG - Singapore 29
CN - Cina 15
BG - Bulgaria 8
CI - Costa d'Avorio 5
FR - Francia 5
SN - Senegal 4
VN - Vietnam 4
HK - Hong Kong 3
JP - Giappone 3
FI - Finlandia 2
GR - Grecia 2
UA - Ucraina 2
BR - Brasile 1
GB - Regno Unito 1
IN - India 1
PK - Pakistan 1
SA - Arabia Saudita 1
Totale 342
Città #
Chandler 25
Fairfield 11
Woodbridge 11
Cambridge 10
Singapore 10
Boardman 9
Houston 8
Montecatini Terme 8
Sofia 8
Pontedera 7
New York 6
Princeton 6
Rome 6
Abidjan 5
Beijing 5
Lawrence 5
Marseille 5
Wilmington 5
Dakar 4
Florence 4
Medford 4
San Diego 4
Serra 4
Ashburn 3
Montevarchi 3
Seattle 3
Athens 2
Dong Ket 2
Duncan 2
Gallarate 2
Hong Kong 2
Madison 2
Milan 2
San Vincenzo 2
Santa Clara 2
Tsukuba 2
Viterbo 2
Al Hazm 1
Aversa 1
Central District 1
Dallas 1
Grosseto 1
Helsinki 1
Hyderabad 1
Lappeenranta 1
Livorno 1
Ogden 1
Parabiago 1
Pittsburgh 1
Poli 1
Redwood City 1
Renfrew 1
São Paulo 1
Vicopisano 1
Totale 218
Nome #
An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick 105
Advantages and Limitations of Fully on-Chip CNN FPGA-Based Hardware Accelerator 67
MEM-OPT: A Scheduling and Data Re-Use System to Optimize On-Chip Memory Usage for CNNs On-Board FPGAs 54
An FPGA-based hardware accelerator for CNNs inference on board satellites: Benchmarking with Myriad 2-based solution for the cloudscout case study 47
A multi-cache system for on-chip memory optimization in fpga-based cnn accelerators 33
FPG-AI: A Technology-Independent Framework for the Automation of CNN Deployment on FPGAs 15
Towards the Extension of FPG-AI Toolflow to RNN Deployment on FPGAs for On-board Satellite Applications 13
Design and Implementation of an FPGA-Based CNN Hardware Accelerator Using Partial Reconfigurability: The CloudScout Case Study 10
A Post-training Quantization Method for the Design of Fixed-Point-Based FPGA/ASIC Hardware Accelerators for LSTM/GRU Algorithms 10
Totale 354
Categoria #
all - tutte 1.731
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 1.731


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2019/202028 0 0 0 0 0 2 4 6 4 3 7 2
2020/202165 1 5 2 0 1 2 10 4 19 5 8 8
2021/202258 2 2 0 3 6 14 0 3 1 6 11 10
2022/2023103 17 17 10 4 5 14 3 4 17 4 8 0
2023/202472 2 3 17 1 4 8 8 2 10 2 10 5
2024/202528 1 12 14 1 0 0 0 0 0 0 0 0
Totale 354