DINELLI, GIANMARCO Statistiche
DINELLI, GIANMARCO
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE
SpaceWire/SpaceFibre Analyser Real-Time (SpaceART) system extension to the Wizardlink Protocol
2023-01-01 Davalle, D.; Dinelli, G.; Benelli, G.; Nannipieri, P.; Ciardi, R.; Fanucci, L.
A multi-cache system for on-chip memory optimization in fpga-based cnn accelerators
2021-01-01 Pacini, T.; Rapuano, E.; Dinelli, G.; Fanucci, L.
An FPGA-based hardware accelerator for CNNs inference on board satellites: Benchmarking with Myriad 2-based solution for the cloudscout case study
2021-01-01 Rapuano, E.; Meoni, G.; Pacini, T.; Dinelli, G.; Furano, G.; Giuffrida, G.; Fanucci, L.
Next-Generation High-Speed Satellite Interconnect: Disclosing the SpaceFibre Protocol – A System Perspective
2021-01-01 Nannipieri, P.; Dinelli, G.; Sterpaio, L. D.; Marino, A.; Fanucci, L.
The very high-speed SpaceFibre multi-lane CoDec: Implementation and experimental performance evaluation
2021-01-01 Dinelli, G.; Nannipieri, P.; Marino, A.; Fanucci, L.; Dello Sterpaio, L.
A serial high-speed satellite communication CODEC: Design and implementation of a SpaceFibre interface
2020-01-01 Nannipieri, Pietro; Dinelli, Gianmarco; Marino, Antonino; Dello Sterpaio, Luca; Leoni, Alessandro; Fanucci, Luca; Davalle, Daniele
Advantages and Limitations of Fully on-Chip CNN FPGA-Based Hardware Accelerator
2020-01-01 Dinelli, Gianmarco; Meoni, Gabriele; Rapuano, Emilio; Fanucci, Luca
AXI4LV: Design and Implementation of a Full-Speed AMBA AXI4-Burst DMA Interface for LabVIEW FPGA
2020-01-01 Dello Sterpaio, L.; Marino, A.; Nannipieri, P.; Dinelli, G.; Fanucci, L.
Design of a SpaceFibre High-Speed Satellite Interface ASIC
2020-01-01 Nannipieri, P.; Dinelli, G.; Dello Sterpaio, L.; Marino, A.; Fanucci, L.
Integration of a SpaceFibre IP Core with the LEON3 Microprocessor Through an AMBA AHB Bus
2020-01-01 Dinelli, G.; Meoni, G.; Nannipieri, P.; Dello Sterpaio, L.; Marino, A.; Fanucci, L.
MEM-OPT: A Scheduling and Data Re-Use System to Optimize On-Chip Memory Usage for CNNs On-Board FPGAs
2020-01-01 Dinelli, G.; Meoni, G.; Rapuano, E.; Pacini, T.; Fanucci, L.
SpaceART SpaceWire and SpaceFibre Analyser Real-Time
2020-01-01 Marino, A.; Leoni, A.; Sterpaio, L. D.; Nannipieri, P.; Dinelli, G.; Benelli, G.; Davalle, D.; Fanucci, L.
A complete egse solution for the spacewire and spacefibre protocol based on the pxi industry standard
2019-01-01 Dello Sterpaio, L.; Marino, A.; Nannipieri, P.; Dinelli, G.; Davalle, D.; Fanucci, L.
A configurable hardware word re-ordering block for multi-lane communication protocols: Design and use case
2019-01-01 Nannipieri, P.; Dinelli, G.; Fanucci, L.
An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick
2019-01-01 Dinelli, Gianmarco; Meoni, Gabriele; Rapuano, Emilio; Benelli, Gionata; Fanucci, Luca
Design of a reduced SpaceFibre interface: An enabling technology for low-cost spacecraft high-speed data-handling
2019-01-01 Dinelli, G.; Nannipieri, P.; Davalle, D.; Fanucci, L.
A SpaceFibre multi lane codec System on a Chip: Enabling technology for low cost satellite EGSE
2018-01-01 Nannipieri, Pietro; Dinelli, Gianmarco; Davalle, Daniele; Fanucci, Luca