An Example of a New VLSI Design Style Based on Systolic Macrocells - A High-Speed Single-Chip Transversal Filter for Signal-Processing Applications

This paper describes the VLSI design of a high-speed single-chip FIR filter for data with a limited number of bits. A new design style that allows easy design of high speed VLSI systems was used. This style is based on the extensive use of systolic arrays and it is well suited to VLSI system realizations for digital signal processing (DSP) applications. This realization shows that high performance systems can be obtained with a systolic approach, using a few main building blocks called macrocells, systolic at the bit-level, of general use and easily interconnected.