Mostra records
Risultati 1 - 20 di 25 (tempo di esecuzione: 0.05 secondi).
Titolo Data di pubblicazione Autore(i) File
An FPGA-based hardware accelerator for CNNs inference on board satellites: Benchmarking with Myriad 2-based solution for the cloudscout case study 1-gen-2021 Rapuano, E.; Meoni, G.; Pacini, T.; Dinelli, G.; Furano, G.; Giuffrida, G.; Fanucci, L.
Enabling Smart Home Voice Control for Italian People with Dysarthria: Preliminary Analysis of Frame Rate Effect on Speech Recognition 1-gen-2021 Marini, M.; Meoni, G.; Mulfari, D.; Vanello, N.; Fanucci, L.
Machine learning assistive application for users with speech disorders 1-gen-2021 Mulfari, D.; Meoni, G.; Marini, M.; Fanucci, L.
The Φ-Sat-1 mission: the first on-board deep neural network demonstrator for satellite earth observation 1-gen-2021 Giuffrida, G.; Fanucci, L.; Meoni, G.; Batic, M.; Buckley, L.; Dunne, A.; Van Dijk, C.; Esposito, M.; Hefele, J.; Vercruyssen, N.; Furano, G.; Pastena, M.; Aschbacher, J.
A robust ransac-based planet radius estimation for onboard visual based navigation 1-gen-2020 de Gioia, F.; Meoni, G.; Giuffrida, G.; Donati, M.; Fanucci, L.
Advantages and Limitations of Fully on-Chip CNN FPGA-Based Hardware Accelerator 1-gen-2020 Dinelli, Gianmarco; Meoni, Gabriele; Rapuano, Emilio; Fanucci, Luca
CCSDS 131.2-B-1 telemetry transmitter: A VHDL IP core and a validation architecture on board RTG4 FPGA 1-gen-2020 Meoni, G.; Cassettari, R.; Bertolucci, M.; Marino, A.; Davalle, D.; Trafeli, M.; Fanucci, L.
Estimating the Downlink Data-Rate of a CCSDS File Delivery Protocol IP Core 1-gen-2020 Meoni, G.; Valverde, A.; Magistrati, G.; Fanucci, L.
Integration of a SpaceFibre IP Core with the LEON3 Microprocessor Through an AMBA AHB Bus 1-gen-2020 Dinelli, G.; Meoni, G.; Nannipieri, P.; Dello Sterpaio, L.; Marino, A.; Fanucci, L.
MEM-OPT: A Scheduling and Data Re-Use System to Optimize On-Chip Memory Usage for CNNs On-Board FPGAs 1-gen-2020 Dinelli, G.; Meoni, G.; Rapuano, E.; Pacini, T.; Fanucci, L.
Towards the Use of Artificial Intelligence on the Edge in Space Systems: Challenges and Opportunities 1-gen-2020 Furano, G.; Meoni, G.; Dunne, A.; Moloney, D.; Ferlet-Cavrois, V.; Tavoularis, A.; Byrne, J.; Buckley, L.; Psarakis, M.; Voss, K. -O.; Fanucci, L.
A high throughput hardware architecture for parallel recursive systematic convolutional encoders 1-gen-2019 Meoni, G.; Giuffrida, G.; Fanucci, L.
A low power keyword spotting algorithm for memory constrained embedded systems 1-gen-2019 Benelli, Gionata; Meoni, Gabriele; Fanucci, Luca
A YOLOv2 convolutional neural network-based Human-Machine Interface for the control of assistive robotic manipulators 1-gen-2019 Giuffrida, G.; Meoni, G.; Fanucci, L.
An FPGA-Based Hardware Accelerator for CNNs Using On-Chip Memories Only: Design and Benchmarking with Intel Movidius Neural Compute Stick 1-gen-2019 Dinelli, Gianmarco; Meoni, Gabriele; Rapuano, Emilio; Benelli, Gionata; Fanucci, Luca
Fully digital low-power implementation of an audio front-end for portable applications 1-gen-2019 Meoni, G.; Pilato, L.; Ciarpi, G.; Palla, A.; Fanucci, L.
A low power Voice Activity Detector for portable applications 1-gen-2018 Meoni, Gabriele; Pilato, Luca; Fanucci, Luca
Design Optimization for High Throughput Recursive Systematic Convolutional Encoders 1-gen-2018 Pilato, Luca; Meoni, Gabriele; Fanucci, Luca
Machine learning in assistive technology: A solution for people with dysarthria 1-gen-2018 Mulfari, D.; Meoni, G.; Fanucci, L.
Machine learning in assistive technology: A solution for people with dysarthria 1-gen-2018 Mulfari, Davide; Meoni, Gabriele; Fanucci, Luca