Sfoglia per Serie
Coverage-driven Verification of HDL IP cores
2011-01-01 Saponara, Sergio; Vitullo, F; Petri, Esa; Fanucci, Luca; Coppola, M; Locatelli, R.
Coverage-driven verification of HDL IP cores : Case study of a router for network-on-chip communication in embedded systems
2011-01-01 Saponara, Sergio; Vitullo, F; Petri, Esa; Fanucci, Luca; Coppola, M; Locatelli, R.
Creation of a Digital Twin Model, Redesign of Plant Structure and New Fuzzy Logic Controller for the Cooling System of a Railway Locomotive
2021-01-01 Poce, M.; Casiello, G.; Ferrari, L.; Dei, L. F. N.; Saponara, S.
CRFlex: A Flexible and Configurable Cryptographic Hardware Accelerator for AES Block Cipher Modes
2022-01-01 Nannipieri, P.; Baldanzi, L.; Crocetti, L.; Di Matteo, S.; Falaschi, F.; Fanucci, L.; Saponara, S.
Cycle-Accurate Verification of the Cryptographic Co-Processor for the European Processor Initiative
2024-01-01 Nannipieri, Pietro; DI MATTEO, Stefano; Crocetti, Luca; Zulberti, Luca; Fanucci, Luca; Saponara, Sergio
DC-link capacitor sizing method for a wireless power transfer circuit to be used in drone opportunity charging
2020-01-01 Carloni, Andrea; Baronti, Federico; DI RIENZO, Roberto; Roncella, Roberto; Saletti, Roberto
Design and Analysis of RF/High-Speed SERDES in 28 nm CMOS Technology for Aerospace Applications
2021-01-01 Cosimi, F.; Ciarpi, G.; Saponara, S.
Design and FPGA Synthesis of BAN Processing Unit for Non-Archimedean Number Crunching
2023-01-01 Rossi, F.; Fiaschi, L.; Cococcioni, M.; Saponara, S.
Design and Implementation of an FPGA-Based CNN Hardware Accelerator Using Partial Reconfigurability: The CloudScout Case Study
2022-01-01 Comino, C.; Pacini, T.; Rapuano, E.; Fanucci, L.
Design of a SpaceFibre High-Speed Satellite Interface ASIC
2020-01-01 Nannipieri, P.; Dinelli, G.; Dello Sterpaio, L.; Marino, A.; Fanucci, L.
Design of an Electronic Oscillator Based on an On-Chip MEMS Resonator Aimed at Sensing Applications
2012-01-01 Pieri, Francesco; Russino, V; Bruschi, Paolo
Design of V2X Communications Based on 5G NR: A Physical Layer Perspective
2022-01-01 Sapienza, Fabiola; Lottici, Vincenzo; Giannetti, Filippo; Saponara, Sergio
Digital Random Number Generator Hardware Accelerator IP-Core for Security Applications
2020-01-01 Baldanzi, L.; Crocetti, L.; Falaschi, F.; Belli, J.; Fanucci, L.; Saponara, S.
Empowering Deafblind Communication Capabilities by Means of AI-Based Body Parts Tracking and Remotely Controlled Robotic Arm for Sign Language Speakers
2020-01-01 Panicacci, S.; Giuffrida, G.; Baldanzi, L.; Massari, L.; Terruso, G.; Zalteri, M.; Filosa, M.; Tonietti, G.; Oddo, C. M.; Fanucci, L.
Enabling Smart Home Voice Control for Italian People with Dysarthria: Preliminary Analysis of Frame Rate Effect on Speech Recognition
2021-01-01 Marini, M.; Meoni, G.; Mulfari, D.; Vanello, N.; Fanucci, L.
Enabling technologies for the in-house monitoring of vital signs in chronic patients
2017-01-01 Donati, M.; Celli, A.; Benini, A.; Fanucci, Luca; Saponara, Sergio
Enabling YOLOv2 Models to Monitor Fire and Smoke Detection Remotely in Smart Infrastructures
2021-01-01 Saponara, S.; Elhanashi, A.; Gagliardi, A.
Estimating the Downlink Data-Rate of a CCSDS File Delivery Protocol IP Core
2020-01-01 Meoni, G.; Valverde, A.; Magistrati, G.; Fanucci, L.
Evaluation of AI and Video Computing Applications on Multiple Heterogeneous Architectures
2024-01-01 Rossi, Federico; Mugnaini, Giacomo; Saponara, Sergio; Cavazzoni, Carlo; Sciarappa, Antonio
Experimental Characterization of a Commercial Sodium-Nickel Chloride Battery for Telecom Applications
2020-01-01 Baronti, Federico; Di Rienzo, Roberto; Roncella, Roberto; Simonte, Gianluca; Saletti, Roberto
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