CASSANO, LUCA MARIA Statistiche
CASSANO, LUCA MARIA
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE
Design and Safety Verification of a Distributed Charge Equalizer for Modular Li-ion Batteries
2014-01-01 Baronti, Federico; Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Roncella, Roberto; Saletti, Roberto
Modeling and simulation of energy-aware adaptive policies for automatic weather stations
2014-01-01 Cesarini, Daniel; Cassano, LUCA MARIA; Fagioli, Alessio; Avvenuti, Marco
Formal approaches to SEUs testing in FPGAs
2013-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea
GABES: a Genetic Algorithm Based Environment for SEU Testing in SRAM-FPGAs
2013-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Cimino, MARIO GIOVANNI COSIMO ANTONIO; Domenici, Andrea
Mitigation of Single Event Upsets in the control logic of a charge equalizer for Li-ion batteries
2013-01-01 Baronti, Federico; Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Roncella, Roberto; Saletti, Roberto
Unexcitability Analysis of SEUs Affecting the Routing Structure of SRAM-based FPGAs
2013-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Sterpone, L.
Accurate Simulation of SEUs in the Configuration Memory of SRAM-based FPGAs
2012-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Luca, Sterpone
Application of a Genetic Algorithm for Testing SEUs in SRAM-FPGA Systems
2012-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Cimino, MARIO GIOVANNI COSIMO ANTONIO; Domenici, Andrea
SEU-X: a SEu Un-eXcitability prover for SRAM-FPGAs
2012-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea
A Tool for Signal Probability Analysis of FPGA-Based Systems
2011-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Masci, PAOLO MANUEL
Failure Probability and Fault Observability of SRAM-FPGA Systems
2011-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea
Failure Probability of SRAM-FPGA Systems with Stochastic Activity Networks
2011-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea
Simulated Injection of Radiation-Induced Logic Faults in FPGAs
2011-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Gennaro, Giancarlo; Pasquariello, Mario
Simulation and Test-Case Generation for PVS Specifications of Control Logics
2011-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Masci, PAOLO MANUEL
Debugging PVS specifications of control logics via event-driven simulation
2010-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Masci, PAOLO MANUEL
Event-driven simulation of control logics from logical specifications, Technical Report DIIEIT-2010-05-01
2010-01-01 Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Masci, PAOLO MANUEL
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Design and Safety Verification of a Distributed Charge Equalizer for Modular Li-ion Batteries | 1-gen-2014 | Baronti, Federico; Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Roncella, Roberto; Saletti, Roberto | |
| Modeling and simulation of energy-aware adaptive policies for automatic weather stations | 1-gen-2014 | Cesarini, Daniel; Cassano, LUCA MARIA; Fagioli, Alessio; Avvenuti, Marco | |
| Formal approaches to SEUs testing in FPGAs | 1-gen-2013 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea | |
| GABES: a Genetic Algorithm Based Environment for SEU Testing in SRAM-FPGAs | 1-gen-2013 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Cimino, MARIO GIOVANNI COSIMO ANTONIO; Domenici, Andrea | |
| Mitigation of Single Event Upsets in the control logic of a charge equalizer for Li-ion batteries | 1-gen-2013 | Baronti, Federico; Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Roncella, Roberto; Saletti, Roberto | |
| Unexcitability Analysis of SEUs Affecting the Routing Structure of SRAM-based FPGAs | 1-gen-2013 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Sterpone, L. | |
| Accurate Simulation of SEUs in the Configuration Memory of SRAM-based FPGAs | 1-gen-2012 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Luca, Sterpone | |
| Application of a Genetic Algorithm for Testing SEUs in SRAM-FPGA Systems | 1-gen-2012 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Cimino, MARIO GIOVANNI COSIMO ANTONIO; Domenici, Andrea | |
| SEU-X: a SEu Un-eXcitability prover for SRAM-FPGAs | 1-gen-2012 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea | |
| A Tool for Signal Probability Analysis of FPGA-Based Systems | 1-gen-2011 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Masci, PAOLO MANUEL | |
| Failure Probability and Fault Observability of SRAM-FPGA Systems | 1-gen-2011 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea | |
| Failure Probability of SRAM-FPGA Systems with Stochastic Activity Networks | 1-gen-2011 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea | |
| Simulated Injection of Radiation-Induced Logic Faults in FPGAs | 1-gen-2011 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Gennaro, Giancarlo; Pasquariello, Mario | |
| Simulation and Test-Case Generation for PVS Specifications of Control Logics | 1-gen-2011 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Masci, PAOLO MANUEL | |
| Debugging PVS specifications of control logics via event-driven simulation | 1-gen-2010 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Masci, PAOLO MANUEL | |
| Event-driven simulation of control logics from logical specifications, Technical Report DIIEIT-2010-05-01 | 1-gen-2010 | Bernardeschi, Cinzia; Cassano, LUCA MARIA; Domenici, Andrea; Masci, PAOLO MANUEL |